GS880E32T-100 GSI [GSI Technology], GS880E32T-100 Datasheet - Page 10
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GS880E32T-100
Manufacturer Part Number
GS880E32T-100
Description
512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS880E32T-100.pdf
(25 pages)
Notes:
1.
2.
3.
Rev: 1.11 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Simplified State Diagram with G
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from Read cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal Read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
X
X
CW
First Write
Burst Write
W
W
CW
10/25
W
CR
R
CR
R
Deselect
X
CW
W
CW
W
R
CR
First Read
Burst Read
GS880E18/32/36T-11/11.5/100/80/66
R
R
CR
X
X
© 2000, Giga Semiconductor, Inc.
Preliminary