GS880E32T-100 GSI [GSI Technology], GS880E32T-100 Datasheet - Page 9

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GS880E32T-100

Manufacturer Part Number
GS880E32T-100
Description
512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
Notes:
1.
2.
3.
Rev: 1.11 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Simplified State Diagram
The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
The upper portion of the diagram assumes active use of only the Enable (E1, E2, and E3) and Write (B
inputs, and that ADSP is tied high and ADSC is tied low.
The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and
assumes ADSP is tied high and ADV is tied low.
X
CW
X
First Write
Burst Write
W
W
CW
9/25
W
CR
R
CR
R
Deselect
X
R
CR
First Read
Burst Read
GS880E18/32/36T-11/11.5/100/80/66
R
R
CR
A
, B
X
X
B
© 2000, Giga Semiconductor, Inc.
, B
C
, B
D
, BW, and GW) control
Preliminary

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