AMD-762JLC AMD [Advanced Micro Devices], AMD-762JLC Datasheet - Page 115
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AMD-762JLC
Manufacturer Part Number
AMD-762JLC
Description
System Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AMD-762JLC.pdf
(122 pages)
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24416C—December 2001
Conventions, Abbreviations, and References
Signals and Bits
Data Terminology
Conventions, Abbreviations, and References
This section contains information about the conventions and
abbreviations used in this document and a list of related
publications.
n Active-Low Signals—Signal names containing a pound sign,
n Signal Ranges—In a range of signals, the highest and lowest
n Reserved Bits and Signals—Signals or bus bits marked
n Three-State—In timing diagrams, signal ranges that are
n Invalid and Don’t-Care—In timing diagrams, signal ranges
The following list defines data terminology:
n Quantities
such as SFILL#, indicate active-Low signals. They are
asserted in their Low-voltage state and negated in their
High-voltage state. When used in this context, High and
Low are written with an initial upper case letter.
signal numbers are contained in brackets and separated by
a colon (for example, D[63:0]).
reserved must be driven inactive or left unconnected, as
indicated in the signal descriptions. These bits and signals
are reserved by AMD for future implementations. When
software reads registers with reserved bits, the reserved bits
must be masked. When software writes such registers, it
must first read the register and change only the
non-reserved bits before writing back to the register.
high impedance are shown as a straight horizontal line
half-way between the high and low levels.
that are invalid or don't-care are filled with a screen
pattern.
•
•
•
•
A word is two bytes (16 bits)
A doubleword is four bytes (32 bits)
A quadword is eight bytes (64 bits)
An
quadwords (64 bytes)
AMD Athlon™
processor
AMD-762™ System Controller Data Sheet
cache
line
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