AMD-762JLC AMD [Advanced Micro Devices], AMD-762JLC Datasheet - Page 69

• Manufacturer Part Number: AMD-762JLC
• Description: System Controller
• Manufacturer: AMD [Advanced Micro Devices]

24416C—December 2001
Figure 15.
Table 21.
DDR Write Timing
Chapter 4
V
V
t
t
t
t
t
t
t
t
t
Notes:
ADsu
ADhld
DQsu
DQhld
WPREsu
WPREhld
WpostA
DSsu
DQSdly
Symbol
IL
IH
(AC)
*
(AC)
CLKOUTH[5:0]
This table contains preliminary information, which is subject to change.
information contained herein is a 30-pF capacitance. A CAS latency of 2.5 is used unless otherwise indicated.
CLKOUTL[5:0]#
AC Input Low Voltage
AC Input High Voltage
ADDR/CMD Setup to CK
ADDR/CMD Hold from CK
DQ/DM Setup to DQS
DQ/DM Hold from DQS
Write Preamble Setup
Write Preamble Hold
Write Postamble
DQS Falling Edge to Next CK Rising Edge
Write Command to First DQS Latching Transition
DDR Clock Specifications
AMD-762™ System Controller Preliminary DDR Timing Information*
Parameter Description
Table 21 shows the AMD-762 system controller preliminary
timing information.
Figure 16 on page 58 shows a DDR interface output block
diagram. Figure 17 on page 59 shows basic AC timing for DDR
write cycles.
Note: All information shown under DDR Write Timing is preliminary.
Electrical Data
t
CKlo
Timing reference load (applied to all chip-level outputs) used for all
V
REF + 0.35
Min
2.5
2.4
2.4
2.8
4.5
5.2
9.0
5.1
7.5
AMD-762™ System Controller Data Sheet
V
REF
t
CKhi
Max
8.5
3.6
2.5
2.6
3.4
5.8
5.0
5.6
9.9
– 0.35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
Figure 17
on page 59
Figure
57