S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 153

Manufacturer Part Number

S912XEQ384J3MALR

S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112

Manufacturer

Freescale Semiconductor

1. Read: Anytime.

Freescale Semiconductor

Address 0x026C

Address 0x026D

Write: Anytime.

Port J pull device enable—Enable pull devices on input pins

These bits conﬁgure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect

if the pin is used as an output. Out of reset all pull device are enabled.

1 Pull device enabled.

0 Pull device disabled.

Port J pull device select—Determine pull device polarity on input pins

This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting a pull-

up or pull-down device if enabled.

1 A rising edge on the associated Port J pin sets the associated ﬂag bit in the PIFJ register. A pull-down device is

0 A falling edge on the associated Port J pin sets the associated ﬂag bit in the PIFJ register.A pull-up device is

Port J Pull Device Enable Register (PERJ)

Port J Polarity Select Register (PPSJ)

connected to the associated Port J pin, if enabled by the associated bit in register PERJ and if the port is used as

connected to the associated Port J pin, if enabled by the associated bit in register PERJ and if the port is used as

Figure 2-63. Port J Pull Device Enable Register (PERJ)

Figure 2-64. Port J Polarity Select Register (PPSJ)

Table 2-61. PERJ Register Field Descriptions

Table 2-62. PPSJ Register Field Descriptions

MC9S12XE-Family Reference Manual Rev. 1.24

Chapter 2 Port Integration Module (S12XEPIMV1)

Access: User read/write