S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 497

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
S12XECRG performs a quality check on the incoming clock signal. As soon as clock quality check
indicates a valid Oscillator Clock signal the reset sequence starts using the Oscillator clock. If after 50
check windows the clock quality check indicated a non-valid Oscillator Clock the reset sequence starts
using Self-Clock Mode.
Figure 11-22
and when the RESET pin is held low.
11.6
The interrupts/reset vectors requested by the S12XECRG are listed in
specification for related vector addresses and priorities.
Freescale Semiconductor
Interrupts
and
Figure 11-23
Internal RESET
RESET
Internal POR
RESET
Internal POR
Internal RESET
Figure 11-22. RESET Pin Tied to V
Interrupt Source
Real time interrupt
LOCK interrupt
SCM interrupt
Figure 11-23. RESET Pin Held Low Externally
show the power-up sequence for cases when the RESET pin is tied to V
MC9S12XE-Family Reference Manual Rev. 1.24
Table 11-18. S12XECRG Interrupt Vectors
Mask
Clock Quality Check
(no Self-Clock Mode)
Clock Quality Check
(no Self Clock Mode)
CCR
I bit
I bit
I bit
128 SYSCLK
) (
) (
) (
128 SYSCLK
) (
) (
) (
Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
64 SYSCLK
DD
64 SYSCLK
(by a Pull-up Resistor)
CRGINT (LOCKIE)
CRGINT (SCMIE)
CRGINT (RTIE)
Local Enable
Table
11-18. Refer to MCU
DD
497

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