S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 400

• Manufacturer Part Number: S912XEQ384J3MALR
• Description: S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
• Manufacturer: Freescale Semiconductor

Chapter 10 XGATE (S12XGATEV3)
BFEXT
Operation
RS1[(o+w):o] ⇒ RD[w:0]; 0 ⇒ RD[15:(w+1)]
Extracts w+1 bits from register RS1 starting at position o and writes them right aligned into register RD.
The remaining bits in RD will be cleared. If (o+w) > 15 only bits [15:o] get extracted.
CCR Effects
Code and CPU Cycles
400
N:
Z:
V:
C:
BFEXT RD, RS1, RS2
N
∆
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
0; cleared.
Not affected.
Z
∆
w = (RS2[7:4])
o = (RS2[3:0])
V
0
Source Form
—
C
15
15
15
MC9S12XE-Family Reference Manual Rev. 1.24
Address
Mode
TRI
0
Bit Field Extract
0
7
1
1
W4
0
5
W4=3, O4=2
0
4
3
3
Machine Code
RD
2
O4
Bit Field Extract
RS1
0
0
0
RS2
RS1
RD
BFEXT
RS2
Freescale Semiconductor
1
1
Cycles
P