S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 742
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S912XEQ384J3MALR
Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEQ384J3MAL.pdf
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Chapter 20 Serial Communication Interface (S12SCIV5)
20.4.4
A 13-bit modulus counter in the baud rate generator derives the baud rate for both the receiver and the
transmitter. The value from 0 to 8191 written to the SBR12:SBR0 bits determines the bus clock divisor.
The SBR bits are in the SCI baud rate registers (SCIBDH and SCIBDL). The baud rate clock is
synchronized with the bus clock and drives the receiver. The baud rate clock divided by 16 drives the
transmitter. The receiver has an acquisition rate of 16 samples per bit time.
Baud rate generation is subject to one source of error:
Table 20-16
When IREN = 0 then,
742
•
Integer division of the bus clock may not give the exact target frequency.
SCI baud rate = SCI bus clock / (16 * SCIBR[12:0])
Baud Rate Generation
lists some examples of achieving target baud rates with a bus clock frequency of 25 MHz.
SBR[12:0]
1302
2604
5208
Bits
163
326
651
41
81
Table 20-16. Baud Rates (Example: Bus Clock = 25 MHz)
1. The address bit identifies the frame as an address
character. See
MC9S12XE-Family Reference Manual Rev. 1.24
Clock (Hz)
609,756.1
308,642.0
153,374.2
Receiver
76,687.1
38,402.5
19,201.2
9600.6
4800.0
Section 20.4.6.6, “Receiver
Transmitter
Clock (Hz)
38,109.8
19,290.1
9585.9
4792.9
2400.2
1200.1
600.0
300.0
Wakeup”.
Baud Rate
38,400
19,200
Target
9,600
4,800
2,400
1,200
600
300
Error
(%)
.76
.47
.16
.15
.01
.01
.00
.00
Freescale Semiconductor
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