S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 742

Manufacturer Part Number

S912XEQ384J3MALR

S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112

Manufacturer

Freescale Semiconductor

Chapter 20 Serial Communication Interface (S12SCIV5)

A 13-bit modulus counter in the baud rate generator derives the baud rate for both the receiver and the

transmitter. The value from 0 to 8191 written to the SBR12:SBR0 bits determines the bus clock divisor.

The SBR bits are in the SCI baud rate registers (SCIBDH and SCIBDL). The baud rate clock is

synchronized with the bus clock and drives the receiver. The baud rate clock divided by 16 drives the

transmitter. The receiver has an acquisition rate of 16 samples per bit time.

Baud rate generation is subject to one source of error:

When IREN = 0 then,

Integer division of the bus clock may not give the exact target frequency.

SCI baud rate = SCI bus clock / (16 * SCIBR[12:0])

Baud Rate Generation

lists some examples of achieving target baud rates with a bus clock frequency of 25 MHz.

Table 20-16. Baud Rates (Example: Bus Clock = 25 MHz)

1. The address bit identiﬁes the frame as an address

character. See

MC9S12XE-Family Reference Manual Rev. 1.24

Section 20.4.6.6, “Receiver

Freescale Semiconductor