S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 535
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S912XEQ384J3MALR
Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEQ384J3MAL.pdf
(1324 pages)
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14.3.2.1
Read or write: Anytime
All bits reset to zero.
Freescale Semiconductor
TC1H (High)
TC2H (High)
TC3H (High)
Module Base + 0x0000
TC1H (Low)
TC2H (Low)
TC3H (Low)
Register
0x003A
0x003B
0x003C
0x003D
0x003E
IOS[7:0]
0x003F
Name
Reset
Field
7:0
W
R
W
W
W
W
W
W
R
R
R
R
R
R
IOS7
Input Capture or Output Compare Channel Configuration
0 The corresponding channel acts as an input capture.
1 The corresponding channel acts as an output compare.
Timer Input Capture/Output Compare Select Register (TIOS)
0
7
TC15
TC15
TC15
Bit 7
TC7
TC7
TC7
Figure 14-3. Timer Input Capture/Output Compare Register (TIOS)
IOS6
0
6
= Unimplemented or Reserved
Figure 14-2. ECT Register Summary (Sheet 5 of 5)
TC14
TC14
TC14
TC6
TC6
TC6
6
MC9S12XE-Family Reference Manual Rev. 1.24
Table 14-2. TIOS Field Descriptions
IOS5
0
5
TC13
TC13
TC13
TC5
TC5
TC5
5
IOS4
0
4
TC12
TC12
TC12
TC4
TC4
TC4
Description
4
IOS3
0
3
TC11
TC11
TC11
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
TC3
TC3
TC3
3
IOS2
0
2
TC10
TC10
TC10
TC2
TC2
TC2
2
IOS1
0
1
TC9
TC1
TC9
TC1
TC9
TC1
1
IOS0
Bit 0
TC8
TC0
TC8
TC0
TC8
TC0
0
0
535
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