LPC1778FBD144,551 NXP Semiconductors, LPC1778FBD144,551 Datasheet - Page 44

• Manufacturer Part Number: LPC1778FBD144,551
• Description: ARM Microcontrollers - MCU CORTEX-M3 512KB FL 96KB SRAM USB 2.0
• Manufacturer: NXP Semiconductors

Specifications of LPC1778FBD144,551

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: LPC178x
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 120 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 3.6 V
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 8
• Interface Type: CAN, I2C, I2S, SSP
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 165
• Number Of Timers: 4
• On-chip Dac: Yes
• Program Memory Type: Flash
• Factory Pack Quantity: 60
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.4 V

NXP Semiconductors
LPC178X_7X
Product data sheet
7.8.1 Features
7.8.2 Interrupt sources
7.10 External memory controller
7.8 Nested Vectored Interrupt Controller (NVIC)
7.9 Pin connect block
The NVIC is an integral part of the Cortex-M3. The tight coupling to the CPU allows for low
interrupt latency and efficient processing of late arriving interrupts.
Each peripheral device has one interrupt line connected to the NVIC but may have several
interrupt flags. Individual interrupt flags may also represent more than one interrupt
source.
Any pin on port 0 and port 2 regardless of the selected function can be programmed to
generate an interrupt on a rising edge, a falling edge, or both.
The pin connect block allows selected pins of the microcontroller to have more than one
function. Configuration registers control the multiplexers to allow connection between the
pin and the on-chip peripherals.
Peripherals should be connected to the appropriate pins prior to being activated and prior
to any related interrupt(s) being enabled. Activity of any enabled peripheral function that is
not mapped to a related pin should be considered undefined.
Most pins can also be configured as open-drain outputs or to have a pull-up, pull-down, or
no resistor enabled.
Remark: Supported memory size and type and EMC bus width vary for different parts
(see
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Controls system exceptions and peripheral interrupts.
On the LPC178x/7x, the NVIC supports 40 vectored interrupts.
32 programmable interrupt priority levels, with hardware priority level masking.
Relocatable vector table.
Non-Maskable Interrupt (NMI).
Software interrupt generation.
Table
2). The EMC pin configuration for each part is shown in
All information provided in this document is subject to legal disclaimers.
Rev. 4.1 — 15 November 2012
32-bit ARM Cortex-M3 microcontroller
LPC178x/7x
Table
© NXP B.V. 2012. All rights reserved.
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