Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 178
Z8F041APH020SG2156
Manufacturer Part Number
Z8F041APH020SG2156
Description
8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
Manufacturer
ZiLOG
Datasheet
1.Z8F082ASJ020EG2156.pdf
(282 pages)
Specifications of Z8F041APH020SG2156
Rohs
yes
Core
eZ8
Processor Series
Z8F041xx
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
4 KB
Data Ram Size
1 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
PDIP-20
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
8
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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PS022827-1212
Bit
Field
RESET
R/W
Address
Flash Option Bit Control Register Definitions
Reading the Flash Information Page
Trim Bit Address Register
R/W
7
0
These serial numbers are stored in the Flash information page and are unaffected by mass
erasure of the device's Flash memory. See the Reading the Flash Information Page section
below and
Randomized Lot Identification Bits
As an optional feature, Zilog is able to provide a factory-programmed random lot identi-
fier. With this feature, all devices in a given production lot are programmed with the same
random number. This random number is uniquely regenerated for each successive produc-
tion lot and is not likely to be repeated.
The randomized lot identifier is a 32 byte binary value, stored in the Flash information
page and is unaffected by mass erasure of the device’s Flash memory. See Reading the
Flash Information Page, below, and
more details.
The following code example shows how to read data from the Flash information area.
; get value at info address 60 (FE60h)
ldx FPS, #%80 ; enable access to flash info page
ld R0, #%FE
ld R1, #%60
ldc R2, @RR0 ; R2 now contains the calibration value
This section briefly describes the features of the Trim Bit Address and Data registers.
The Trim Bit Address (TRMADR) Register contains the target address for an access to the
trim option bits (Table 86).
R/W
the Serialization Data section on page 173
Table 86. Trim Bit Address Register (TRMADR)
6
0
TRMADR: Trim Bit Address (00H to 1FH)
R/W
5
0
P R E L I M I N A R Y
R/W
the Randomized Lot Identifier section on page 174
4
0
FF6H
R/W
3
0
for more details.
Z8 Encore! XP
Flash Option Bit Control Register
R/W
2
0
Product Specification
R/W
1
0
®
F082A Series
R/W
0
0
for
161
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