C8051F537-ITR Silicon Labs, C8051F537-ITR Datasheet - Page 122
![no-image](/images/no-image-200.jpg)
C8051F537-ITR
Manufacturer Part Number
C8051F537-ITR
Description
8-bit Microcontrollers - MCU 2KB 12ADC 125C 20Pin MCU
Manufacturer
Silicon Labs
Datasheet
1.C8051F536-ITR.pdf
(220 pages)
Specifications of C8051F537-ITR
Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
2 KB
Data Ram Size
256 B
On-chip Adc
Yes
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
16
Interface Type
SPI, UART
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
16
Number Of Timers
3
On-chip Dac
No
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
2500
Supply Voltage - Max
2.7 V, 5.25 V
Supply Voltage - Min
2 V, 2.7 V
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C8051F52x/F53x
13.1. Priority Crossbar Decoder
The Priority Crossbar Decoder (Figure 13.3) assigns a priority to each I/O function, starting at the top with
UART0. When a digital resource is selected, the least-significant unassigned Port pin is assigned to that
resource (excluding UART0, which will be assigned to pins P0.4 and P0.5). If a Port pin is assigned, the
Crossbar skips that pin when assigning the next selected resource. Additionally, the Crossbar will skip Port
pins whose associated bits in the PnSKIP registers are set. The PnSKIP registers allow software to skip
Port pins that are to be used for analog input, dedicated functions, or GPIO.
Important Note on Crossbar Configuration: If a Port pin is claimed by a peripheral without use of the
Crossbar, its corresponding PnSKIP bit should be set. This applies to P1.0 and/or P0.7 (F53x/F53xA) or
P0.2 and/or P0.3 (F52x/F52xA) for the external oscillator, P0.0 for V
122
Note: 4-Wire SPI Only.
TSSOP 20 and QFN 20
PIN I/O
TX0
RX0
TX0
RX0
SCK
MISO
MOSI
NSS*
LIN-TX
LIN_RX
CP0
CP0A
/SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
SF Signals
SF Signals
Figure 13.3. Crossbar Priority Decoder with No Pins Skipped
Port pin potentially assignable to peripheral
Special Function Signals are not assigned by the crossbar.
When these signals are enabled, the Crossbar must be manually configured
to skip their corresponding port pins.
0
0
1
0
2
0
P0SKIP[0:7]
3
0
P0
(TSSOP 20 and QFN 20)
4
0
5
0
6
0
Rev. 1.4
7
0
0
C8051F53xA/F53x-C devices
0
1
0
C8051F53x devices
2
0
P1SKIP[0:7]
3
0
P1
4
0
5
0
6
0
7
0
REF
, P1.2 (F53x/F53xA) or P0.5
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