C8051F537-ITR Silicon Labs, C8051F537-ITR Datasheet - Page 143
![no-image](/images/no-image-200.jpg)
C8051F537-ITR
Manufacturer Part Number
C8051F537-ITR
Description
8-bit Microcontrollers - MCU 2KB 12ADC 125C 20Pin MCU
Manufacturer
Silicon Labs
Datasheet
1.C8051F536-ITR.pdf
(220 pages)
Specifications of C8051F537-ITR
Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
2 KB
Data Ram Size
256 B
On-chip Adc
Yes
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
16
Interface Type
SPI, UART
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
16
Number Of Timers
3
On-chip Dac
No
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
2500
Supply Voltage - Max
2.7 V, 5.25 V
Supply Voltage - Min
2 V, 2.7 V
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14.3. System Clock Selection
The internal oscillator requires little start-up time and may be selected as the system clock immediately fol-
lowing the OSCICN write that enables the internal oscillator. External crystals and ceramic resonators typ-
ically require a start-up time before they are settled and ready for use. The Crystal Valid Flag (XTLVLD in
register OSCXCN) is set to 1 by hardware when the external oscillator is settled. To avoid reading a false
XTLVLD in crystal mode, the software should delay at least 1 ms between enabling the external
oscillator and checking XTLVLD. RC and C modes typically require no startup time.
The CLKSL bit in register CLKSEL selects which oscillator source is used as the system clock. CLKSL
must be set to 1 for the system clock to run from the external oscillator; however the external oscillator may
still clock certain peripherals (timers, PCA) when another oscillator is selected as the system clock. The
system clock may be switched on-the-fly between the internal oscillator and external oscillator, as long as
the selected clock source is enabled and has settled.
SFR Definition 14.5. CLKSEL: Clock Select
Bits7–6: Unused. Read = 00b; Write = don’t care.
Bits5–4: Reserved. Read = 00b; Must write 00b.
Bit3:
Bits2–1: Reserved. Read = 00b; Must write 00b.
Bit0:
Bit7
R
-
Unused. Read = 0b; Write = don’t care.
CLKSL: System Clock Select
0: Internal Oscillator (as determined by the IFCN bits in register OSCICN).
1: External Oscillator.
Bit6
R
-
Reserved Reserved
R/W
Bit5
R/W
Bit4
Rev. 1.4
Bit3
R
-
Reserved Reserved
R/W
Bit2
C8051F52x/F53x
R/W
Bit1
SFR Address:
CLKSL
R/W
Bit0
00000000
Reset Value
0xA9
143
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