ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 52

• Manufacturer Part Number: ADP1046DC1-EVALZ
• Description: Daughter Cards & OEM Boards ADP1046 Daughter Card
• Manufacturer: Analog Devices
• Series: ADP1046r

Specifications of ADP1046DC1-EVALZ

• Rohs: yes
• Product: Daughter Cards
• Description/function: 100 kHz daughter board
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Factory Pack Quantity: 1
• For Use With: ADP1046

Register 0x0F allows the user to program the
and ACSNS flags are always active during soft start.
Table 15. Register 0x0F—Soft Start Blank Fault Flags Register
Bits
7
6
5
4
3
2
1
0
VALUE REGISTERS
Table 16. Register 0x10—First Flag ID
Bits
[7:4]
[3:0]
Table 17. Register 0x11—RTD Current Source
Bits
[7:6]
[5:0]
ADP1046
Bit Name
Blank SR
Blank OTP
Blank FLAGIN
Blank local OVP
(accurate and fast)
Blank load OVP
Blank CS2 accurate
OCP
Blank CS1 accurate
OCP
Blank CS1 fast OCP
Bit Name
Reserved
First flag ID
Bit Name
RTD current setting
Current trim
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R/W
R/W
R/W
Description
Setting this bit means that the SR1 and SR2 PWM outputs are not enabled until the end of the soft
start ramp time.
Setting this bit means that the OTP flag is ignored until the end of the soft start ramp time.
Setting this bit means that the FLAGIN flag is ignored until the end of the soft start ramp time.
Setting this bit means that the local OVP flag is ignored until the end of the soft start ramp time.
Setting this bit means that the load OVP flag is ignored until the end of the soft start ramp time.
Setting this bit means that the CS2 accurate OCP flag is ignored until the end of the soft start
ramp time.
Setting this bit means that the CS1 accurate OCP flag is ignored until the end of the soft start
ramp time.
Setting this bit means that the CS1 fast OCP flag is ignored until the end of the soft start ramp time.
Description
Reserved.
These bits record the flag that was set first. Restarting the power supply resets this register. Reading
this register also resets the register.
Bit 3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Description
These bits set the size of the current source on the RTD pin.
Bit 7
0
0
1
1
These six bits are used to trim the current source on the RTD pin. Each LSB corresponds to 160 nA,
independent of the RTD current setting selected in Register 0x11[7:6].
ADP1046
Bit 2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Bit 6
0
1
0
1
to ignore the specified flags until the end of the soft start ramp time. The UVP
Rev. B | Page 52 of 92
Bit 1
0
Current Source (µA)
10
20
30
40
0
0
1
1
0
0
1
1
0
0
1
1
0
1
1
Bit 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Fault Register
None
Register 0x01, Bit 3
Register 0x01, Bit 2
Register 0x03, Bit 1
Register 0x00, Bit 2
Register 0x00, Bit 1
Register 0x00, Bit 0
Register 0x01, Bit 1
Register 0x01, Bit 0
Register 0x02, Bit 0
Register 0x02, Bit 7
Register 0x01, Bit 6
Register 0x01, Bit 5
Register 0x01, Bit 7
Register 0x02, Bit 5
Register 0x03, Bit 2
Flag
No flag
VCORE OV
VDD OV
EEPROM CRC fault
CS1 fast OCP
CS1 accurate OCP
CS2 accurate OCP
Load OVP
Local OVP (fast and accurate)
FLAGIN
OTP
UVP
CS2 reverse voltage
Voltage continuity
Share bus
ACSNS
Data Sheet