ADP1046ADC1-EVALZ Analog Devices, ADP1046ADC1-EVALZ Datasheet

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ADP1046ADC1-EVALZ

Manufacturer Part Number
ADP1046ADC1-EVALZ
Description
Power Management IC Development Tools
Manufacturer
Analog Devices
Type
Power Switchesr
Series
ADP1046Ar
Datasheet

Specifications of ADP1046ADC1-EVALZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
ADP1046A
Input Voltage
36 V to 60 V
Output Voltage
2.5 V
Description/function
Daughter card for ADP1046A
Interface Type
I2C
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
For Use With
ADP1046A
Data Sheet
FEATURES
Integrates all typical PWM controller functions
I
Extensive fault detection and protection
Extensive programming and telemetry
Fast digital calibration
User accessible EEPROM
APPLICATIONS
AC-to-DC power supplies
Isolated dc-to-dc power supplies
Redundant power supply systems
Server, storage, network, and communications
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
2
C interface
7 PWM control signals
Digital control loop
Integrated programmable loop filters
Programmable voltage line feedforward
Dedicated soft start filter
Remote and local voltage sense
Primary and secondary side current sense
Synchronous rectifier control
Current sharing
OrFET control
infrastructure
INPUT
DC
DRIVER
iCoupler
®
Document Feedback
CS1
OUTA
OUTB
OUTC
OUTD
OUTAUX
RES
TYPICAL APPLICATION CIRCUIT
ADD
SR1 SR2
DRIVER
RTD
VCORE FLAGIN PSON PGOOD2 PGOOD1 SDA SCL
ACSNS
Figure 1.
MICROCONTROLLER
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
GENERAL DESCRIPTION
The
designed for ac-to-dc and isolated dc-to-dc secondary side
applications. The
ADP1043A
including voltage feedforward and improved loop response to
maximize efficiency.
The
maximum flexibility, and minimum design time. Features
include local and remote voltage sense, primary and secondary
side current sense, digital pulse-width modulation (PWM)
generation, current sharing, and redundant OrFET control. The
control loop digital filter and compensation terms are integrated
and can be programmed over the I
protection features include overcurrent protection (OCP), over-
voltage protection (OVP), undervoltage lockout (UVLO), and
overtemperature protection (OTP).
The built-in EEPROM provides extensive programming of the
integrated loop filter, PWM signal timing, inrush current, and
soft start timing and sequencing. Reliability is improved through
a built-in checksum and programmable protection circuits.
A comprehensive GUI is provided for easy design of loop
filter characteristics and programming of the safety features.
The industry-standard I
monitoring and system test functions.
The
from a single 3.3 V supply.
CS2– CS2+ PGND
ADP1046A
Digital Controller for Isolated
ADP1046A
ADP1046A
ADP1046A
Power Supply Applications
and offers several enhancements and new features,
is a flexible, digital secondary side controller
is optimized for minimal component count,
is available in a 32-lead LFCSP and operates
ADP1046A
VS1 GATE
DRIVER
©2013 Analog Devices, Inc. All rights reserved.
2
VDD DGND AGND
C bus provides access to the many
VS2
V
DD
is pin-compatible with the
SHAREo
SHAREi
VS3+
VS3–
2
C interface. Programmable
ADP1046A
LOAD
www.analog.com

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ADP1046ADC1-EVALZ Summary of contents

Page 1

... Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. ...

Page 2

ADP1046A TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Typical Application Circuit ............................................................. 1 Revision History ............................................................................... 3 Specifications ..................................................................................... 4 Absolute Maximum Ratings ............................................................ 9 Thermal Resistance ...................................................................... 9 Soldering ........................................................................................ 9 ESD Caution ...

Page 3

Data Sheet Fault Conditions .......................................................................... 39 Timeout Condition ..................................................................... 39 Data Transmission Faults ........................................................... 39 Data Content Faults .................................................................... 39 EEPROM .......................................................................................... 41 EEPROM Overview .................................................................... 41 Page Erase Operation ................................................................. 41 Read Operation (Byte Read and Block Read) ......................... ...

Page 4

ADP1046A SPECIFICATIONS −40°C to +125°C, unless otherwise noted. FSR = full-scale range Table 1. Parameter Symbol SUPPLY Supply Voltage V DD Supply Current I DD POWER-ON RESET Power-On Reset ...

Page 5

Data Sheet Parameter Symbol VS3 HIGH SPEED ADC Equivalent Sampling f SAMP Frequency Equivalent Resolution Dynamic Range VS1 FAST OVP COMPARATOR Threshold Accuracy Propagation Delay VS1 UVP DIGITAL COMPARATOR VS1 UVP Accuracy Propagation Delay AC SENSE COMPARATOR Input Voltage Threshold ...

Page 6

ADP1046A Parameter Symbol CURRENT SENSE 2 (CS2+, CS2− PINS) Input Voltage Range V IN Usable Input Voltage Range ADC Clock Frequency Temperature Coefficient 120 mV Range 60 mV Range Current Sense Measurement 120 mV Setting 60 mV Setting Current Sense ...

Page 7

Data Sheet Parameter Symbol Measurement Accuracy Temperature Readings Using Internal Linearization Scheme OTP Threshold Accuracy Comparator Speed OTP Threshold Hysteresis PGOOD1, PGOOD2, SHAREo PINS Output Low Voltage V OL PSON, SHAREi PINS Input Low Voltage V IL Input High Voltage ...

Page 8

ADP1046A Parameter Symbol EEPROM RELIABILITY Endurance 1 Data Retention 2 1 Endurance is qualified as per JEDEC Standard 22, Method A117, and is measured at −40°C, +25°C, +85°C, and +125°C. Endurance conditions are subject to change pending EEPROM qualification. 2 ...

Page 9

Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage (Continuous Digital Pins: OUTA, OUTB, OUTC, OUTD, OUTAUX, SR1, SR2, GATE, PGOOD1, PGOOD2 VS3− to PGND, AGND, DGND VS1, VS2, VS3+, ACSNS RTD, ADD CS1, CS2+, CS2− FLAGIN, ...

Page 10

ADP1046A PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NOTES 1. THE ADP1046A HAS AN EXPOSED THERMAL PAD ON THE UNDERSIDE OF Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 VS2 Power Supply Output Voltage Sense Input. This signal is referenced ...

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Data Sheet Pin No. Mnemonic Description 14 OUTD PWM Output for Primary Side Switch. This signal is referenced to AGND. This pin can be disabled when not in use. 15 OUTAUX Auxiliary PWM Output. This signal is referenced to AGND. ...

Page 12

ADP1046A TYPICAL PERFORMANCE CHARACTERISTICS 2.5 MAX SPEC 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 MIN SPEC –2.5 –60 –40 – TEMPERATURE (°C) Figure 4. VS1 ADC Accuracy vs. Temperature (from 10% to 90% of ...

Page 13

Data Sheet 2.5 MAX SPEC 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 MIN SPEC –2.5 –60 –40 – TEMPERATURE (°C) Figure 10. ACSNS ADC Accuracy vs. Temperature (from 10% to 90% of FSR) 1.220 ...

Page 14

ADP1046A THEORY OF OPERATION The ADP1046A is a secondary side controller for switch mode power supplies designed for use in isolated redundant applications. The ADP1046A integrates the typical functions that are needed to control a power supply, such ...

Page 15

Data Sheet CURRENT SENSE The ADP1046A has two current sense inputs: CS1 and CS2±. These inputs sense, protect, and control the primary input current, secondary output current, and the share bus information. They can be calibrated to reduce errors due ...

Page 16

ADP1046A VOLTAGE SENSE AND CONTROL LOOP Multiple voltage sense inputs on the ADP1046A monitoring, control, and protection of the power supply output. This information is available through the I sense points can be calibrated digitally to minimize errors due to ...

Page 17

... Digital Filter Programming Registers section recommended that the Analog Devices, Inc., software GUI be used to program the filter. The software GUI displays the filter response in Bode plot format and can be used to calculate all stability criteria for the power supply ...

Page 18

... CS2± is below the load current threshold (programmed using Register 0x3B[2:0]). The Analog Devices software GUI allows the user to program the light load mode filter in the same manner as the normal mode filter recommended that the GUI be used for this purpose. ...

Page 19

Data Sheet SYNCHRONOUS RECTIFICATION SR1 and SR2 are recommended for use as the PWM control signals when using synchronous rectification. These PWM signals can be configured much like the other PWM outputs. An optional soft start can be applied to ...

Page 20

ADP1046A SOFT START The turning on and off of the ADP1046A hardware PSON pin and/or the software PSON register, depending on the configured settings in Register 0x2C. When the user turns on the power supply (enables PSON), the following soft ...

Page 21

Data Sheet PSON VS3 VS1 (VS1 – VS2) VOLTAGE OrFET GATE LOOP CONTROLLED FROM VS1 LOOP CONTROLLED FROM VS3 UVP FLAG PGOOD1 PSON V OUT NORMAL MODE FILTER (NMF) OR SOFT START FILTER (SSF PS_ON DELAY RAMP TIME ...

Page 22

ADP1046A OrFET CONTROL (GATE PIN) The GATE control signal drives an external OrFET. The OrFET is used in redundant systems to protect against power flow into the power supply from the output terminals of another supply. This ensures that power ...

Page 23

Data Sheet OrFET Operation Examples Hot Plug into a Live Bus A new PSU is plugged into a live 12 V bus (yellow). The internal voltage, VS1 (red), is ramped up before the OrFET is turned on. After the OrFET ...

Page 24

ADP1046A VDD When VDD is applied, a certain time elapses before the part is capable of regulating the power supply. When VDD rises above the power-on reset and UVLO levels, it takes approximately 20 μs for VCORE to reach its ...

Page 25

Data Sheet CURRENT SHARING The ADP1046A supports both analog current sharing and digital current sharing. The ADP1046A information for current sharing (this setting is programmed in Register 0x29[3]). Analog Current Sharing Analog current sharing uses the internal current sensing circuitry ...

Page 26

ADP1046A Figure 35 shows the possible signals on the share bus. LOGIC 1 LOGIC 0 IDLE PREVIOUS BIT t BIT Figure 35. Share Bus High, Low, and Idle Bits The length of a bit (t ) ...

Page 27

Data Sheet POWER SUPPLY SYSTEM AND FAULT MONITORING The ADP1046A has extensive system and fault monitoring capabilities. The system monitoring functions include voltage, current, power, and temperature readings. The fault conditions include out-of-limit values for current, voltage, power, and temperature. ...

Page 28

ADP1046A POWER READINGS The output power value register (Register 0x19) is the product of the VS3 voltage value and the CS2 current value. Therefore, a combination of the formulas in the Voltage Readings section and the CS2+, CS2− Pins section ...

Page 29

Data Sheet Temperature Linearization Scheme The ADP1046A implements a linearization scheme based on a preselected combination of thermistor (100 kΩ, 1%), external resistor (16.5 kΩ, 1%), and the 46 µA current source for best performance when linearizing measured temperatures in ...

Page 30

ADP1046A 5kΩ 5kΩ CS2– CS2+ 1V 200µA CS2 OCP CS2 has one OCP protection circuit: CS2 accurate OCP (see Figure 40). The reading at the output of the CS2 ADC (Register 0x18) is compared to a programmable OCP threshold. The ...

Page 31

Data Sheet UNDERVOLTAGE PROTECTION (UVP) If the voltage sensed at the VS1 pin falls below the program- mable UVP threshold, the UVP flag is set. The UVP threshold is programmed in Register 0x34; the GUI can also be used, as ...

Page 32

... Register 0x28[2]. The volt-second balance settings are programmed in Register 0x28 and in Register 0x76 through Register 0x78 recommended that the Analog Devices software GUI be used to program these settings. The compensation of the PWM drive signals is performed on the edges of two selected outputs. The SR1 and SR2 edges can ...

Page 33

Data Sheet POWER SUPPLY CALIBRATION AND TRIM The ADP1046A allows the entire power supply to be calibrated and trimmed digitally in the production environment. It can calibrate items such as output voltage and trim for tolerance errors introduced by sense ...

Page 34

ADP1046A VOLTAGE CALIBRATION AND TRIM The voltage sense inputs are optimized for sensing signals (the usable input range is 1.4 V system, a 12:1 resistor divider is required to reduce the 12 V ...

Page 35

Data Sheet Using the OTP Value The second option does not use the linearization scheme. Instead, the user programs an RTD current and sets the OTP threshold in millivolts. Due to the nonlinear nature of the NTC thermistor ...

Page 36

ADP1046A LAYOUT GUIDELINES This section explains best practices that should be followed to ensure optimal performance of the ADP1046A. In general, place all components as close to the ADP1046A All signals should be referenced to their respective grounds. CS2+ AND ...

Page 37

Data Sheet INTERFACE COMMUNICATION The ADP1046A slave is a 2-wire interface that can be used 2 to communicate with other I C-compliant master devices and is compatible in a multimaster, multislave bus configuration. The ...

Page 38

ADP1046A Command Overview 2 Data transfer using the I C slave is established using commands. All commands start with a slave address with the R/ W bit cleared (set to 0), followed by the command code (register address). All commands ...

Page 39

Data Sheet GENERAL CALL SUPPORT The ADP1046A is capable of decoding and acknowledging a general call address. The general call address is supported for send, write, and read commands that use Address 0x00 as the slave address. The I 2 ...

Page 40

ADP1046A Invalid or Unsupported Command Code If an invalid or unsupported command code is sent to the slave, the slave considers this a data content fault and responds as follows: • Issues a no ...

Page 41

Data Sheet EEPROM The ADP1046A has a built-in EEPROM controller that is used to communicate with the embedded 8K × 8-byte EEPROM. The EEPROM, also called Flash®/EE, is partitioned into two major blocks: the INFO block and the main block. ...

Page 42

ADP1046A WRITE OPERATION (BYTE WRITE AND BLOCK WRITE) Write to Main Block, Page 0 and Page 1 Page 0 and Page 1 of the main block are reserved for storing the default settings and user settings, respectively. The user cannot ...

Page 43

Data Sheet SAVING REGISTER SETTINGS TO THE EEPROM The register settings cannot be saved to the factory default set- tings located in Page 0 of the EEPROM main block. This is to prevent the user from accidentally overriding the factory ...

Page 44

... PWM topology windows. The GUI is also an information center, displaying the status of all readings, monitoring, and flags on the ADP1046A. For more information about the GUI, contact Analog Devices for the latest software and a user guide. Evaluation boards are also available by contacting Analog Devices. ...

Page 45

Data Sheet REGISTER LISTING Table 7. Register List Address Register Name Fault Registers 0x00 Fault Register 1 0x01 Fault Register 2 0x02 Fault Register 3 0x03 Fault Register 4 0x04 Latched Fault Register 1 0x05 Latched Fault Register 2 0x06 ...

Page 46

ADP1046A Address Register Name Voltage Sense Registers 0x31 VS3 voltage setting (remote voltage) 0x32 VS1 overvoltage limit (OVP) 0x33 VS2 and VS3 overvoltage limit (OVP) 0x34 VS1 undervoltage limit (UVP) 0x35 Line impedance limit 0x36 Load line impedance 0x37 Fast ...

Page 47

Data Sheet Address Register Name 0x65 Light load mode digital filter zero setting 0x66 Light load mode digital filter pole setting 0x67 Light load mode digital filter HF gain setting 0x68 Reserved Soft Start Filter Programming Registers 0x71 Soft start ...

Page 48

ADP1046A DETAILED REGISTER DESCRIPTIONS FAULT REGISTERS Register 0x04 to Register 0x07 are latched fault registers. In these registers, flags are not reset when the fault disappears. Flags are cleared only by a register read (provided that the fault no longer ...

Page 49

Data Sheet Table 10. Register 0x02—Fault Register 3 and Register 0x06—Latched Fault Register Fault Normal Operation) Bits Bit Name R/W 7 OTP R 6 Fast OVP R 5 Share bus R 4 Constant current R ...

Page 50

ADP1046A Register 0x08 to Register 0x0D allow the user to program the response when each flag is set. Table 13. Register 0x08 to Register 0x0D—Fault Configuration Register Bit Descriptions Bits Bit Name R/W 7 Timing R/W [6:4] Action R/W 3 ...

Page 51

Data Sheet Register 0x0F allows the user to program the and ACSNS flags are always active during soft start. Table 15. Register 0x0F—Soft Start Blank Fault Flags Register Bits Bit Name R/W 7 Blank SR R/W 6 Blank OTP R/W ...

Page 52

ADP1046A Table 18. Register 0x12—HF ADC Reading Bits Bit Name R/W [7:0] HF ADC reading R Table 19. Register 0x13—CS1 Value (Input Current) Bits Bit Name R/W [15:4] Input current value R [3:0] Reserved R Table 20. Register 0x14—ACSNS Value ...

Page 53

Data Sheet Table 24. Register 0x18—CS2 Value (Output Current) Bits Bit Name R/W [15:4] Output current value R [3:0] Reserved R Table 25. Register 0x19—CS2 × VS3 Value (Output Power) Bits Bit Name R/W [15:0] Output power value R Table ...

Page 54

ADP1046A CURRENT SENSE AND CURRENT LIMIT REGISTERS Table 33. Register 0x21—CS1 Gain Trim Bits Bit Name R/W 7 Gain polarity R/W [6:0] CS1 gain trim R/W Table 34. Register 0x22—CS1 Accurate OCP Limit Bits Bit Name R/W [7:5] CS1 fast ...

Page 55

Data Sheet Table 39. Register 0x27—CS1/CS2 Fast OCP Settings Bits Bit Name R/W [7:6] CS1 fast OCP debounce R/W 5 CS2 nominal voltage R/W drop 4 CS1 fast OCP bypass R/W 3 Constant current mode R/W 2 CS2 current sensing ...

Page 56

ADP1046A Table 41. Register 0x29—Share Bus Bandwidth Bits Bit Name R/W [7:5] Reserved R/W 4 Bit stream R/W 3 Current share R/W enable [2:0] Share bus R/W bandwidth Table 42. Register 0x2A—Share Bus Setting Bits Bit Name R/W [7:4] Number ...

Page 57

Data Sheet Bits Bit Name R/W 2 Reserved R/W 1 Disable light load R/W during soft start 0 Force soft start R/W filter Table 45. Register 0x2D—PGOOD Debounce and Pin Polarity Settings Bits Bit Name R/W [7:6] PGOOD1 turn-on R/W ...

Page 58

ADP1046A Table 47. Register 0x2F—OTP Threshold Bits Bit Name R/W Description [7:0] OTP threshold R/W This register, adding 0 as the MSB, results in a 9-bit OTP threshold value. This 9-bit value is compared to the nine MSBs of the ...

Page 59

Data Sheet VOLTAGE SENSE REGISTERS Table 49. Register 0x31—VS3 Voltage Setting (Remote Voltage) Bits Bit Name R/W [7:0] VS3 voltage setting R/W Table 50. Register 0x32—VS1 Overvoltage Limit (OVP) Bits Bit Name R/W [7:3] VS1 OVP setting R/W 2 Reserved ...

Page 60

ADP1046A Bits Bit Name R/W [1:0] OVP sampling R/W Table 52. Register 0x34—VS1 Undervoltage Limit (UVP) Bits Bit Name R/W 7 End of cycle R/W shutdown [6:0] VS1 UVP setting R/W Table 53. Register 0x35—Line Impedance Limit Bits Bit Name ...

Page 61

Data Sheet Bits Bit Name R/W [2:0] Load line setting R/W Table 55. Register 0x37—Fast OVP Comparator Bits Bit Name R/W [7:6] Fast OVP debounce R/W [5:0] Fast OVP threshold R/W Table 56. Register 0x38—VS1 Trim Bits Bit Name R/W ...

Page 62

... This register contains the manufacturer’s ID code for the device used by the manufacturer for test code purposes and should not be read from in normal operation. This value is hardwired to 0x41 to represent the Analog Devices ID code. Table 62. Register 0x3E—Device ID Bits Bit Name ...

Page 63

Data Sheet PWM AND SYNCHRONOUS RECTIFIER TIMING REGISTERS Figure 57 and Table 63 to Table 93 describe the implementation and programming of the seven PWM signals that are output from the ADP1046A. In general recommended that t SYNC ...

Page 64

ADP1046A Bits Bit Name R/W [5:0] Switching frequency R/W Description Bit 5 Bit 4 Bit 3 Bit ...

Page 65

Data Sheet Table 64. Register 0x40—PWM Switching Frequency Setting Bits Bit Name R/W [7:6] Reserved R/W [5:0] Switching frequency R/W Description Reserved. This register sets the switching frequency of all the PWM pins other than the OUTAUX pin. Bit 5 ...

Page 66

ADP1046A Bits Bit Name R/W [5:0] Switching frequency R/W Table 65. Register 0x41—OUTA Rising Edge Timing (OUTA Pin) Bits Bit Name R/W [7:0] t R/W 1 Table 66. Register 0x42—OUTA Rising Edge Setting (OUTA Pin) Bits Bit Name R/W [7:4] ...

Page 67

Data Sheet Table 69. Register 0x45—OUTB Rising Edge Timing (OUTB Pin) Bits Bit Name R/W [7:0] t R/W 3 Table 70. Register 0x46—OUTB Rising Edge Setting (OUTB Pin) Bits Bit Name R/W [7: Modulate enable R/W ...

Page 68

ADP1046A Table 74. Register 0x4A—OUTC Rising Edge Setting (OUTC Pin) Bits Bit Name R/W [7: Modulate enable R sign R Reserved R/W 0 Volt-second balance R/W source selection Table 75. Register 0x4B—OUTC ...

Page 69

Data Sheet Table 78. Register 0x4E—OUTD Rising Edge Setting (OUTD Pin) Bits Bit Name R/W [7: Modulate enable R sign R Reserved R/W 0 Volt-second balance R/W source selection Table 79. Register ...

Page 70

ADP1046A Table 82. Register 0x52—SR1 Rising Edge Setting (SR1 Pin) Bits Bit Name R/W [7: Modulate enable R sign R Reserved R soft start edge R/W control Table 83. Register ...

Page 71

Data Sheet Table 86. Register 0x56—SR2 Rising Edge Setting (SR2 Pin) Bits Bit Name R/W [7: Modulate enable R sign R/W 11 [1:0] Reserved R/W Table 87. Register 0x57—SR2 Falling Edge Timing (SR2 Pin) ...

Page 72

ADP1046A Table 90. Register 0x5A—OUTAUX Rising Edge Setting (OUTAUX Pin) Bits Bit Name R/W [7: Modulate enable R sign R/W 13 [1:0] Reserved R/W Table 91. Register 0x5B—OUTAUX Falling Edge Timing (OUTAUX Pin) Bits ...

Page 73

Data Sheet Table 93. Register 0x5D—OUTx and SRx Pin Disable Settings Bits Bit Name R/W 7 OUTAUX disable R/W 6 SR2 disable R/W 5 SR1 disable R/W 4 OUTD disable R/W 3 OUTC disable R/W 2 OUTB disable R/W 1 ...

Page 74

ADP1046A Bits Bit Name R/W [2:0] Slew rate R/W Table 96. Register 0x60—Normal Mode Digital Filter LF Gain Setting Bits Bit Name R/W [7:0] LF gain setting R/W Table 97. Register 0x61—Normal Mode Digital Filter Zero Setting Bits Bit Name ...

Page 75

Data Sheet SOFT START FILTER PROGRAMMING REGISTERS Table 105. Register 0x71—Soft Start Digital Filter LF Gain Setting Bits Bit Name R/W [7:0] LF gain setting R/W Table 106. Register 0x72—Soft Start Digital Filter Zero Setting Bits Bit Name R/W [7:0] ...

Page 76

ADP1046A Bits Bit Name R sign R Modulate enable sign R/W 4 Table 111. Register 0x77—Volt-Second Balance Settings (OUTC and OUTD Pins) Bits Bit Name R/W 7 Modulate enable, t R/W ...

Page 77

Data Sheet Table 113. Register 0x79—SR Delay Compensation Bits Bit Name R/W [7:6] Reserved R/W [5:0] SR driver delay R/W Table 114. Register 0x7A—Filter Transitions Bits Bit Name R/W [7:6] Reserved R/W [5:3] HF ADC configuration R/W 2 Enable soft ...

Page 78

ADP1046A Table 117. Register 0x7D—Light Load Mode Threshold Settings Bits Bit Name R/W [7:6] Reserved R/W [5:4] Debounce R/W [3:2] Light load mode R/W averaging speed [1:0] Light load mode R/W hysteresis Table 118. Register 0x7F—GO Byte Bits Bit Name ...

Page 79

Data Sheet EEPROM REGISTERS 2 Refer to the I C communication protocol specification for more information about how to write these commands to the ADP1046A. Table 119. Register 0x81—RESTORE_DEFAULT_ALL Bits Bit Name Type N/A RESTORE_DEFAULT_ALL Send byte Table 120. Register ...

Page 80

ADP1046A Table 128. Register 0x8A—EEPROM_INFO Bits Bit Name Type Variable EEPROM_INFO Block read Table 129. Register 0x8B—EEPROM_DATA_00 Bits Bit Name Type Variable EEPROM_DATA_00 Block read Table 130. Register 0x8C—EEPROM_DATA_01 Bits Bit Name Type Variable EEPROM_DATA_01 Block read Table 131. Register ...

Page 81

Data Sheet Table 138. Register 0x94—EEPROM_DATA_09 Bits Bit Name Type Variable EEPROM_DATA_09 Block read/ write Table 139. Register 0x95—EEPROM_DATA_10 Bits Bit Name Type Variable EEPROM_DATA_10 Block read/ write Table 140. Register 0x96—EEPROM_DATA_11 Bits Bit Name Type Variable EEPROM_DATA_11 Block read/ ...

Page 82

ADP1046A RESONANT MODE OPERATION The ADP1046A supports control of a resonant converter. Resonant converters are an alternative to traditional fixed frequency converters. They offer high switching frequency, small size, and high efficiency. Figure 59 illustrates a widely used series resonant ...

Page 83

Data Sheet ADJUSTING THE TIMING OF THE PWM OUTPUTS To accurately adjust the timing of the PWM outputs, the following registers can be used to set the dead time and delays of the PWM outputs: Register 0x41, Register 0x43, Register ...

Page 84

ADP1046A RESONANT MODE REGISTER DESCRIPTIONS Table 145. Register 0x40—PWM Switching Frequency Setting in Resonant Mode Bits Bit Name R/W [7:6] Reserved R/W [5:0] Switching frequency R/W Table 146. Register 0x41—OUTA Rising Edge Dead Time in Resonant Mode Bits Bit Name ...

Page 85

Data Sheet Table 150. Register 0x45—OUTB Rising Edge Dead Time in Resonant Mode Bits Bit Name R/W [7:0] Δt (rising edge dead R/W 3 time of OUTB) Table 151. Register 0x46—Highest Switching Frequency Limit Setting (Minimum Switching Cycle in Resonant ...

Page 86

ADP1046A Table 154. Register 0x49—OUTC Rising Edge Dead Time in Resonant Mode Bits Bit Name R/W [7:0] Δt (rising edge dead R/W 5 time of OUTC) Table 155. Register 0x4A—Burst Mode Operation in Resonant Mode Bits Bit Name R/W [7:6] ...

Page 87

Data Sheet Table 158. Register 0x4F—OUTD Falling Edge Dead Time in Resonant Mode Bits Bit Name R/W [7:0] Δt (falling edge dead R/W 8 time of OUTD) Table 159. Register 0x51—SR1 Rising Edge Dead Time in Resonant Mode Bits Bit ...

Page 88

... Model Temperature Range ADP1046AACPZ-RL −40°C to +125°C ADP1046AACPZ-R7 −40°C to +125°C ADP1046A-100-EVALZ ADP1046ADC1-EVALZ ADP-I2C-USB RoHS Compliant Part refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...

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