ADP1046ADC1-EVALZ Analog Devices, ADP1046ADC1-EVALZ Datasheet - Page 61

• Manufacturer Part Number: ADP1046ADC1-EVALZ
• Description: Power Management IC Development Tools
• Manufacturer: Analog Devices
• Type: Power Switchesr
• Series: ADP1046Ar

Specifications of ADP1046ADC1-EVALZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: ADP1046A
• Input Voltage: 36 V to 60 V
• Output Voltage: 2.5 V
• Description/function: Daughter card for ADP1046A
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• For Use With: ADP1046A

Data Sheet
Bits
[2:0]
Table 55. Register 0x37—Fast OVP Comparator
Bits
[7:6]
[5:0]
Table 56. Register 0x38—VS1 Trim
Bits
7
[6:0]
Table 57. Register 0x39—VS2 Trim
Bits
7
[6:0]
Table 58. Register 0x3A—VS3 Trim
Bits
7
[6:0]
Bit Name
Fast OVP debounce
Fast OVP threshold
Bit Name
Trim polarity
VS1 trim
Bit Name
Trim polarity
VS2 trim
Bit Name
Trim polarity
VS3 trim
Bit Name
Load line setting
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
These bits specify how much the output voltage decreases from nominal at full load. The amount
of output resistance introduced can be calculated as follows (these bits specify the value of N):
For more information, see the Digital Load Line and Slew Rate section.
Bit 2
0
0
0
0
1
1
1
1
Description
These bits set the fast OVP debounce time.
Bit 7
0
0
1
1
These bits set the threshold for the fast OVP analog comparator. This threshold is programmable
from 0.8 V to 1.6 V. Setting this value to 0x00 corresponds to a 0.8 V threshold. Setting this value to
0x3F corresponds to a 1.6 V threshold. Each LSB increments the threshold by 12.5 mV. The fast OVP
threshold can be set using the following formula:
Description
1 = negative gain is introduced.
0 = positive gain is introduced.
These bits set the amount of gain trim that is applied to the VS1 ADC reading. This register trims
the voltage at the VS1 pin for external resistor tolerances. When there is 1 V on the VS1 pin, this
register is trimmed until the VS1 voltage value (Register 0x15[15:4]) reads 2560 (0xA00).
Description
1 = negative gain is introduced.
0 = positive gain is introduced.
These bits set the amount of gain trim that is applied to the VS2 ADC reading. This register trims
the voltage at the VS2 pin for external resistor tolerances. When there is 1 V on the VS2 pin, this
register is trimmed until the VS2 voltage value (Register 0x16[15:4]) reads 2560 (0xA00).
Description
1 = negative gain is introduced.
0 = positive gain is introduced.
These bits set the amount of gain trim that is applied to the VS3 ADC reading. This register trims
the voltage at the VS3 pins for external resistor tolerances. When there is 1 V on each VS3 pin, this
register is trimmed until the VS3 voltage value (Register 0x17[15:4]) reads 2560 (0xA00). The VS3
trim must be performed before the load OVP and load UVP trims are performed.
R
Fast_OVP_Threshold = (Bits[5:0] × 0.8 V/63) + 0.8 V
OUT
= 0.1 × V
Bit 1
0
0
1
1
0
0
1
1
Bit 6
0
1
0
1
OUT_NOM
Rev. 0 | Page 61 of 88
× CS2 R
Bit 0
0
1
0
1
0
1
0
1
Min
0
0.64
1.92
7.98
SENSE
/(CS2 Range × 2
Impedance Setting
Setting 0
Setting 1
Setting 2
Setting 3
Setting 4
Setting 5
Setting 6
Setting 7
Debounce Time (µs)
Typ
0
0.96
2.24
8
Max
0
1.28
2.56
8.32
N
)
ADP1046A