ADP1046ADC1-EVALZ Analog Devices, ADP1046ADC1-EVALZ Datasheet - Page 76

• Manufacturer Part Number: ADP1046ADC1-EVALZ
• Description: Power Management IC Development Tools
• Manufacturer: Analog Devices
• Type: Power Switchesr
• Series: ADP1046Ar

Specifications of ADP1046ADC1-EVALZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: ADP1046A
• Input Voltage: 36 V to 60 V
• Output Voltage: 2.5 V
• Description/function: Daughter card for ADP1046A
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• For Use With: ADP1046A

ADP1046A
Bits
2
1
0
Table 111. Register 0x77—Volt-Second Balance Settings (OUTC and OUTD Pins)
Bits
7
6
5
4
3
2
1
0
Table 112. Register 0x78—Volt-Second Balance Settings (SR1 and SR2 Pins)
Bits
7
6
5
4
3
2
1
0
Bit Name
Modulate enable, t
t
Modulate enable, t
t
Modulate enable, t
t
Modulate enable, t
t
Bit Name
Modulate enable, t
t
Modulate enable, t
t
Modulate enable, t
t
Modulate enable, t
t
Bit Name
t
Modulate enable, t
t
3
4
5
6
7
8
9
10
11
12
sign
sign
sign
sign
sign
sign
sign
sign
sign
sign
5
6
7
8
9
10
11
12
4
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Setting this bit enables modulation from balance control on the OUTB falling edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Description
Setting this bit enables modulation from balance control on the OUTC rising edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Setting this bit enables modulation from balance control on the OUTC falling edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Setting this bit enables modulation from balance control on the OUTD rising edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Setting this bit enables modulation from balance control on the OUTD falling edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Description
Setting this bit enables modulation from balance control on the SR1 rising edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Setting this bit enables modulation from balance control on the SR1 falling edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Setting this bit enables modulation from balance control on the SR2 rising edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Setting this bit enables modulation from balance control on the SR2 falling edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Rev. 0 | Page 76 of 88
3
4
5
6
7
8
9
10
11
12
3
4
5
6
7
8
9
10
11
12
right.
right.
right.
right.
right.
right.
right.
left.
left.
left.
left.
left.
left.
left.
right.
right.
right.
left.
left.
left.
Data Sheet
9
11
10
12
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5
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7
4
. It is
6
. It is
8
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