LH28F320SKTD-ZR Sharp Microelectronics, LH28F320SKTD-ZR Datasheet - Page 23

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LH28F320SKTD-ZR

Manufacturer Part Number
LH28F320SKTD-ZR
Description
IC FLASH 32MBIT 70NS 48TSOP
Manufacturer
Sharp Microelectronics
Datasheet

Specifications of LH28F320SKTD-ZR

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
32M (4Mx8, 2Mx16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V, 4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
425-2463
LHF32KZR
4.10 Block Erase Suspend Command
The Block Erase Suspend command allows block-
erase interruption to read or (multi) word/byte-write
data in another block of memory. Once the block-
erase process starts, writing the Block Erase
Suspend command requests that the WSM suspend
the block erase sequence at a predetermined point in
the algorithm. The device outputs status register data
when read after the Block Erase Suspend command
is written. Polling status register bits SR.7 and SR.6
can determine when the block erase operation has
been suspended (both will be set to "1"). STS will
also transition to High Z. Specification t
the block erase suspend latency.
At this point, a Read Array command can be written
to read data from blocks other than that which is
suspended. A (Multi) Word/Byte Write command
sequence can also be issued during erase suspend
to program data in other blocks. Using the (Multi)
Word/Byte Write Suspend command (see Section
4.11), a (multi) word/byte write operation can also be
suspended. During a (multi) word/byte write operation
with block erase suspended, status register bit SR.7
will return to "0" and the STS (if set to RY/BY#)
output will transition to V
remain "1" to indicate block erase suspend status.
The only other valid commands while block erase is
suspended are Read Status Register and Block
Erase Resume. After a Block Erase Resume
command is written to the flash memory, the WSM
will continue the block erase process. Status register
bits SR.6 and SR.7 will automatically clear and STS
will return to V
is written, the device automatically outputs status
register data when read (see Figure 10). V
remain at V
block erase) while block erase is suspended. RP#
must also remain at V
PPH1/2/3
OL
. After the Erase Resume command
(the same V
IH
. Block erase cannot resume
OL
. However, SR.6 will
PP
level used for
WHRZ2
PP
defines
must
LHF32KZR
until (multi) word/byte write operations initiated during
block erase suspend have completed.
4.11 (Multi) Word/Byte Write Suspend
The (Multi) Word/Byte Write Suspend command
allows (multi) word/byte write interruption to read data
in other flash memory locations. Once the (multi)
word/byte write process starts, writing the (Multi)
Word/Byte Write Suspend command requests that
the WSM suspend the (multi) word/byte write
sequence at a predetermined point in the algorithm.
The device continues to output status register data
when read after the (Multi) Word/Byte Write Suspend
command is written. Polling status register bits SR.7
and SR.2 can determine when the (multi) word/byte
write operation has been suspended (both will be set
to "1"). STS will also transition to High Z.
Specification t
write suspend latency.
At this point, a Read Array command can be written
to read data from locations other than that which is
suspended. The only other valid commands while
(multi) word/byte write is suspended are Read Status
Register and (Multi) Word/Byte Write Resume. After
(Multi) Word/Byte Write Resume command is written
to the flash memory, the WSM will continue the
(multi) word/byte write process. Status register bits
SR.2 and SR.7 will automatically clear and STS will
return to V
command is written, the device automatically outputs
status register data when read (see Figure 11). V
must remain at V
for (multi) word/byte write) while in (multi) word/byte
write suspend mode. WP# must also remain at V
V
IL
.
Command
OL
WHRZ1
. After the (Multi) Word/Byte Write
PPH1/2/3
defines the (multi) word/byte
(the same V
PP
level used
IH
20
PP
or

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