APMOTOR56F8000E Freescale Semiconductor, APMOTOR56F8000E Datasheet - Page 60

• Manufacturer Part Number: APMOTOR56F8000E
• Description: KIT DEMO MOTOR CTRL SYSTEM
• Manufacturer: Freescale Semiconductor
• Type: Motor / Motion Controllers & Driversr

Specifications of APMOTOR56F8000E

• Accessory Type: Motor Controller
• Input Voltage: 9 V
• Interface Type: RS-232
• Product: Power Management Modules
• For Use With/related Products: DEMO56F8013, DEMO56F8013-E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.5.16.1
This read-only bit reflects the state of the interrupt to the 56800E core.
5.5.16.2
These read-only bits reflect the state of the new interrupt priority level bits being presented to the 56800E
core. These bits indicate the priority level needed for a new IRQ to interrupt the current interrupt being
sent to the 56800E core. This field is only updated when the 56800E core jumps to a new interrupt service
routine.
Note:
5.5.16.3
This read-only field shows the vector number (VAB[6:0]) used at the time the last IRQ was taken. In the
case of a Fast Interrupt, it shows the lower address bits of the jump address. This field is only updated when
the 56800E core jumps to a new interrupt service routine.
Note:
5.5.16.4
This bit allows all interrupts to be disabled.
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0 = No interrupt is being sent to the 56800E core
1 = An interrupt is being sent to the 56800E core
00 = Required nested exception priority levels are 0, 1, 2, or 3
01 = Required nested exception priority levels are 1, 2, or 3
10 = Required nested exception priority levels are 2 or 3
11 = Required nested exception priority level is 3
0 = Normal operation (default)
1 = All interrupts disabled
Nested interrupts may cause this field to be updated before the original interrupt service routine can
read it.
Nested interrupts may cause this field to be updated before the original interrupt service routine can
read it.
Interrupt (INT)—Bit 15
Interrupt Priority Level (IPIC)—Bits 14–13
Vector Number - Vector Address Bus (VAB)—Bits 12–6
Interrupt Disable (INT_DIS)—Bit 5
IPIC_VALUE[1:0]
00
01
10
11
Table 5-3 Interrupt Priority Encoding
56F8014 Technical Data, Rev. 11
No interrupt or SWILP
Current Interrupt
Priority Level
Priority 2 or 3
Priority 0
Priority 1
Exception Priority
Priorities 0, 1, 2, 3
Required Nested
Priorities 1, 2, 3
Priorities 2, 3
Priority 3
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