EVAL-ADV7180LFEBZ Analog Devices Inc, EVAL-ADV7180LFEBZ Datasheet - Page 106

• Manufacturer Part Number: EVAL-ADV7180LFEBZ
• Description: BOARD EVAL FOR ADV7180 LFCSP
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADV7180LFEBZ

• Main Purpose: Video, SDTV Video Decoder - NTSC, PAL, SECAM
• Embedded: No
• Utilized Ic / Part: ADV7180
• Primary Attributes: CVBS (Composite), Y/C (S-video), and YPrPb (Component) Inputs
• Secondary Attributes: 8-bit ITU-R BT.656 YCrCb 4:2:2 Output
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADV7180
48-LEAD LQFP
Mode 1 CVBS Input (Composite Video on A
All standards are supported through autodetect, 8-bit, 4:2:2 ITU-R BT.656 output on P0 to P7 for the 32-lead LQFP.
Table 112. Mode 1 CVBS Input
Register Address (Hex)
00
04
17
31
3D
3E
3F
0E
55
0E
Mode 2 S-Video Input (Y on A
All standards are supported through autodetect, 8-bit, ITU-R BT.656 output on P0 to P7 for the 32-lead LQFP.
Table 113. Mode 2 S-Video Input
Register Address (Hex)
00
04
31
3D
3E
3F
58
0E
55
0E
Mode 3 525i/625i YPrPb Input (Y on A
All standards are supported through autodetect, 8-bit, ITU-R BT.656 output on P0 to P7 for the 32-lead LQFP.
Table 114. Mode 3 YPrPb Input
Register Address (Hex)
00
31
3D
3E
3F
54
0E
55
0E
Register Value (Hex)
01
57
41
02
A2
6A
A0
80
81
00
Register Value (Hex)
08
57
02
A2
6A
A0
04
80
81
00
Register Value (Hex)
09
02
A2
6A
A0
4E
80
81
00
IN
3 and C on A
IN
1, Pr on A
IN
IN
2)
6)
INSEL = CVBS in on A
Enable SFL
MWE enable manual window, color kill threshold to 2
BLM optimization
BGB optimization
Hidden space
User space
Notes
INSEL = YPrPb, Y = A
Clear NEWAV_MODE, SAV/EAV to suit ADV video encoders
MWE enable manual window
BLM optimization
ADI recommended
ADI recommended
Hidden space
ADC configuration
User space
Notes
Select SH1
Clear NEWAV_MODE, SAV/EAV to suit ADV video encoders
ADC configuration
Notes
INSEL = Y/C, Y = A
Enable SFL
Clear NEWAVMODE, SAV/EAV to suit ADV video encoders
MWE enable manual window, color kill threshold to 2
BLM optimization
BGB optimization
Mandatory write; this must be performed for correct operation
Hidden space
ADC configuration
User space
IN
4, and Pb on A
Rev. F | Page 106 of 116
IN
3, C = A
IN
IN
IN
5)
1, Pr = A
2
IN
6
IN
4, Pb = A
IN
5