EVAL-ADV7180LFEBZ Analog Devices Inc, EVAL-ADV7180LFEBZ Datasheet - Page 25

• Manufacturer Part Number: EVAL-ADV7180LFEBZ
• Description: BOARD EVAL FOR ADV7180 LFCSP
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADV7180LFEBZ

• Main Purpose: Video, SDTV Video Decoder - NTSC, PAL, SECAM
• Embedded: No
• Utilized Ic / Part: ADV7180
• Primary Attributes: CVBS (Composite), Y/C (S-video), and YPrPb (Component) Inputs
• Secondary Attributes: 8-bit ITU-R BT.656 YCrCb 4:2:2 Output
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SYNC PROCESSING
The ADV7180 extracts syncs embedded in the analog input
video signal. There is currently no support for external HS/VS
inputs. The sync extraction is optimized to support imperfect
video sources, such as VCRs with head switches. The actual
algorithm used employs a coarse detection based on a threshold
crossing, followed by a more detailed detection using an adaptive
interpolation algorithm. The raw sync information is sent to a
line length measurement and prediction block. The output of
this is then used to drive the digital resampling section to
ensure that the ADV7180 outputs 720 active pixels per line.
The sync processing on the ADV7180 also includes the following
specialized postprocessing blocks that filter and condition the
raw sync information retrieved from the digitized analog video:
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VBI DATA RECOVERY
The ADV7180 can retrieve the following information from the
input video:
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The ADV7180 is also capable of automatically detecting the
incoming video standard with respect to
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The ADV7180 can configure itself to support PAL B/D/I/G/H,
PAL M, PAL N, PAL Combination N, NTSC M, NTSC J,
SECAM 50 Hz/60 Hz, NTSC 4.43, and PAL 60.
VSYNC processor. This block provides extra filtering of the
detected VSYNCs to improve vertical lock.
HSYNC processor. The HSYNC processor is designed to
filter incoming HSYNCs that have been corrupted by
noise, providing much improved performance for video
signals with a stable time base but poor SNR.
Wide screen signaling (WSS)
Copy generation management system (CGMS)
Closed captioning (CCAP)
Macrovision protection presence
EDTV data
Gemstar-compatible data slicing
Teletext
VITC/VPS
Color subcarrier frequency
Field rate
Line rate
Rev. F | Page 25 of 116
GENERAL SETUP
Video Standard Selection
The VID_SEL[3:0] bits (Address 0x00[7:4]) allow the user to
force the digital core into a specific video standard. Under
normal circumstances, this is not necessary. The VID_SEL[3:0]
bits default to an autodetection mode that supports PAL, NTSC,
SECAM, and variants thereof.
Autodetection of SD Modes
To guide the autodetect system of the ADV7180, individual
enable bits are provided for each of the supported video standards.
Setting the relevant bit to 0 inhibits the standard from being
detected automatically. Instead, the system chooses the closest of
the remaining enabled standards. The results of the autodetection
block can be read back via the status registers (see the Global
Status Register section for more information).
VID_SEL[3:0], Address 0x00[7:4]
Table 24. VID_SEL Function
VID_SEL[3:0]
0000 (default)
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
AD_SEC525_EN, Enable Autodetection of SECAM 525
Line Video, Address 0x07[7]
Setting AD_SEC525_EN to 0 (default) disables the autodetection
of a 525-line system with a SECAM style, FM-modulated color
component.
Setting AD_SEC525_EN to 1 enables the detection of a SECAM
style, FM-modulated color component.
Description
Autodetect (PAL B/G/H/I/D), NTSC J
(no pedestal), SECAM
Autodetect (PAL B/G/H/I/D), NTSC M
(pedestal), SECAM
Autodetect (PAL N) (pedestal), NTSC J
(no pedestal), SECAM
Autodetect (PAL N) (pedestal), NTSC M
(pedestal), SECAM
NTSC J
NTSC M
PAL 60
NTSC 4.43
PAL B/G/H/I/D
PAL N = PAL B/G/H/I/D (with pedestal)
PAL M (without pedestal)
PAL M
PAL Combination N
PAL Combination N (with pedestal)
SECAM
SECAM (with pedestal)
ADV7180