EVAL-ADV7180LFEBZ Analog Devices Inc, EVAL-ADV7180LFEBZ Datasheet - Page 14

• Manufacturer Part Number: EVAL-ADV7180LFEBZ
• Description: BOARD EVAL FOR ADV7180 LFCSP
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADV7180LFEBZ

• Main Purpose: Video, SDTV Video Decoder - NTSC, PAL, SECAM
• Embedded: No
• Utilized Ic / Part: ADV7180
• Primary Attributes: CVBS (Composite), Y/C (S-video), and YPrPb (Component) Inputs
• Secondary Attributes: 8-bit ITU-R BT.656 YCrCb 4:2:2 Output
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADV7180
64-LEAD LQFP
Table 11. 64-Lead LQFP Pin Function Description
Pin No.
1
2
3, 10, 24, 57
4, 11
5 to 8, 14 to 19,
25, 26, 59 to 62
9
12, 13, 55, 56
20
21
22
23, 58
27, 28, 33, 41, 42,
44, 45, 50
29
30
31
32, 37, 43
34
35, 36, 46 to 49
Mnemonic
INTRQ
HS
DGND
DVDDIO
P11 to P8,
P7 to P2, P1,
P0, P15 to P12
SFL
GPO0 to GPO3
LLC
XTAL1
XTAL
DVDD
NC
PWRDWN
ELPF
PVDD
AGND
TEST_0
A
IN
1 to A
IN
6
DVDDIO
DVDDIO
NC = NO CONNECT
O
O
G
P
O
O
O
O
I
P
I
P
G
I
Type
O
I
I
INTRQ
DGND
DGND
GPO1
GPO0
SFL
P11
P10
HS
P9
P8
P7
P6
P5
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Description
Interrupt Request Output. Interrupt occurs when certain signals are detected on the input
video (see Table 108).
Horizontal Synchronization Output Signal.
Digital Ground.
Digital I/O Supply Voltage (1.8 V to 3.3 V).
Video Pixel Output Port. See Table 100 for output configuration for 8-bit and 16-bit modes.
Subcarrier Frequency Lock. This pin contains a serial output stream that can be used to lock
the subcarrier frequency when this decoder is connected to any Analog Devices digital
video encoder.
General-Purpose Outputs. These pins can be configured via I
This is a line-locked output clock for the pixel data output by the ADV7180. It is nominally
27 MHz but varies up or down according to video line length.
This pin should be connected to the 28.6363 MHz crystal or left as a no connect if an external
1.8 V, 28.6363 MHz clock oscillator source is used to clock the ADV7180. In crystal mode,
the crystal must be a fundamental crystal.
This is the input pin for the 28.6363 MHz crystal, or this pin can be overdriven by an external
1.8 V, 28.6363 MHz clock oscillator source. In crystal mode, the crystal must be a fundamental
crystal.
Digital Supply Voltage (1.8 V).
No Connect. These pins are not connected internally.
A logic low on this pin places the ADV7180 in power-down mode.
The recommended external loop filter must be connected to the ELPF pin, as shown in Figure 57.
PLL Supply Voltage (1.8 V).
Analog Ground.
This pin must be tied to DGND.
Analog Video Input Channels.
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
PIN 1
Figure 10. 64-Lead LQFP Pin Configuration
Rev. F | Page 14 of 116
(Not to Scale)
ADV7180
TOP VIEW
LQFP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
A
A
A
NC
NC
AGND
NC
NC
AVDD
VREFN
VREFP
AGND
A
A
TEST_0
NC
IN
IN
IN
IN
IN
5
4
3
2
1
2
C to allow control of external devices.