AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 55

KIT DEV FOR SAM9G10 ARM

AT91SAM9G10-EK

Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT91SAM9G10-EK

Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
12.3.2
12.4
6462A–ATARM–03-Jun-09
Debug and Test Pin Description
Test Environment
Figure 12-3 on page 55
preted by the tester. In this example, the “board in test” is designed using a number of JTAG-
compliant devices. These devices can be connected to form a single scan chain.
Figure 12-3. Application Test Environment Example
Table 12-1.
Pin Name
NRST
TST
TCK
TDI
TDO
TMS
NTRST
RTCK
JTAGSEL
DRXD
DTXD
Debug and Test Pin List
AT91SAM9G10-based Application Board In Test
shows a test environment example. Test vectors are sent and inter-
Connector
ICE/JTAG
Interface
AT91SAM9G10
Function
Microcontroller Reset
Test Mode Select
Test Clock
Test Data In
Test Data Out
Test Mode Select
Test Reset Signal
Returned Test Clock
JTAG Selection
Debug Receive Data
Debug Transmit Data
JTAG
Chip n
ICE and JTAG
Debug Unit
Reset/Test
Test Adaptor
Chip 2
Chip 1
Input/Output
Tester
Output
Output
Output
Type
AT91SAM9G10
Input
Input
Input
Input
Input
Input
Input
Active Level
High
Low
Low
55

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