C8051F320-TB Silicon Laboratories Inc, C8051F320-TB Datasheet - Page 142
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C8051F320-TB
Manufacturer Part Number
C8051F320-TB
Description
BOARD PROTOTYPING W/C8051F320
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F320-TB
Contents
Board
Processor To Be Evaluated
C8051F320/F321
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F320
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F320/1
15.3. USB Register Access
The USB0 controller registers listed in Table 15.2 are accessed through two SFRs: USB0 Address
(USB0ADR) and USB0 Data (USB0DAT). The USB0ADR register selects which USB register is targeted
by reads/writes of the USB0DAT register. See Figure 15.2.
Endpoint control/status registers are accessed by first writing the USB register INDEX with the target end-
point number. Once the target endpoint number is written to the INDEX register, the control/status registers
associated with the target endpoint may be accessed. See the “Indexed Registers” section of Table 15.2
for a list of endpoint control/status registers.
Note: The USB clock must be active when accessing USB registers.
142
USB0DAT
USB0ADR
SFRs
8051
Figure 15.2. USB0 Register Access Scheme
Rev. 1.4
Registers
Registers
Common
Interrupt
Register
Access
FIFO
Index
USB Controller
Endpoint0 Control/
Endpoint1 Control/
Endpoint2 Control/
Endpoint3 Control/
Status Registers
Status Registers
Status Registers
Status Registers
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