PG-FP4-E Renesas Electronics America, PG-FP4-E Datasheet - Page 84

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PG-FP4-E

Manufacturer Part Number
PG-FP4-E
Description
PROGRAMMER FLASH MEMORY UNIV
Manufacturer
Renesas Electronics America
Datasheet

Specifications of PG-FP4-E

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.1.2
the values displayed were set during the last programming session.
82
The [Type Setting] menu is used to check the target device rewrite environment currently set for the PG-FP4. All
The setting cannot be changed by this menu.
[Type Setting >]
• Pressing the Next key displays the [Option Setting] menu.
• Pressing the Enter key displays the following commands that can be executed from the [Type Setting] menu.
• Pressing the Cancel key displays the [Commands] menu again.
[Device Port]
[Multiply Rate]
[Serial CLK]
[CLK source]
[PG CPU CLK]
[Target CPU CLK] Target CPU CLK indicates the frequency of the clock on the user system that is supplied to
[Mode]
[PRG Area]
↓ Next button
↓ Next button
↓ Next button
↓ Next button
↓ Next button
↓ Next button
↓ Next button
[Type Setting] menu
Device Port displays any of the following to indicate what is selected as an interface between
the target device and the PG-FP4.
Multiply Rate displays the multiplication rate of the operating clock of the target device.
Serial CLK displays the serial clock rate in Hz that is used to interface the target device and
PG-FP4.
CLK source indicates either of the following as a source to supply the operation clock to the
target device.
PG CPU CLK indicates the frequency of the clock supplied by the PG-FP4 in MHz.
the target device, in MHz.
Mode indicates any of the following operation modes when the Blank Check, Erase,
Program, Verify, or EPV command is executed.
PRG Area indicates which of the areas of the target device connected to the PG-FP4 is to be
programmed. This menu is valid only when the operation mode is other than chip (only when
area or block is displayed in the above mode).
SIO 0, SIO1, SIO 2, SIO H/S, IIC 0, IIC 1, IIC 2, IIC 3,
UART 0, UART 1, UART 2, UART 3, PORT 0, PORT 1, PORT 2
Programmer: Clock is supplied from the PG-FP4.
Target:
chip, area, block
Display example
Display example
*In the chip mode, the display is always as follows:
CHAPTER 6 PG-FP4 OPERATION IN STANDALONE MODE
Mode
BEPV: chip
PRG Area
0 to 1
PRG Area
0 to 0
Clock is supplied on the user system.
User’s Manual U15260EJ4V0UM

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