ATMEGA328P-AU Atmel, ATMEGA328P-AU Datasheet - Page 33

MCU AVR 32K FLASH 32TQFP

ATMEGA328P-AU

Manufacturer Part Number
ATMEGA328P-AU
Description
MCU AVR 32K FLASH 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA328P-AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA328P-20AU
ATMEGA328P-20AU
Q3790246

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8.6
8271C–AVR–08/10
Calibrated Internal RC Oscillator
Table 8-9.
Table 8-10.
Note:
By default, the Internal RC Oscillator provides an approximate 8.0 MHz clock. Though voltage
and temperature dependent, this clock can be very accurately calibrated by the user. See
28-10 on page 322
See
This clock may be selected as the system clock by programming the CKSEL Fuses as shown in
Table
the pre-programmed calibration value into the OSCCAL Register and thereby automatically cali-
brates the RC Oscillator. The accuracy of this calibration is shown as Factory calibration in
28-10 on page
By changing the OSCCAL register from SW, see
page
The accuracy of this calibration is shown as User calibration in
When this Oscillator is used as the chip clock, the Watchdog Oscillator will still be used for the
Watchdog Timer and for the Reset Time-out. For more information on the pre-programmed cali-
bration value, see the section
Table 8-11.
Notes:
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
CKSEL3...
SUT1...0
0100
0101
”System Clock Prescaler” on page 36
01
10
11
37, it is possible to get a higher calibration accuracy than by using the factory calibration.
0
8-11. If selected, it will operate with no external components. During reset, hardware loads
(1)
1. This option should only be used if frequency stability at start-up is not important for the
1. The device is shipped with this option selected.
2. If 8 MHz frequency exceeds the specification of the device (depends on V
application
Frequency Range
Fuse can be programmed in order to divide the internal frequency by 8.
Start-up Times for the Low-frequency Crystal Oscillator Clock Selection
Start-up Times for the Low-frequency Crystal Oscillator Clock Selection
Internal Calibrated RC Oscillator Operating Modes
Additional Delay from Reset (V
322.
for more details. The device is shipped with the CKDIV8 Fuse programmed.
7.3 - 8.1
Power-down and Power-save
Start-up Time from
4 CK + 4.1 ms
4 CK + 65 ms
(2)
”Calibration Byte” on page
32K CK
(MHz)
1K CK
for more details.
CC
= 5.0V)
”OSCCAL – Oscillator Calibration Register” on
Reserved
Recommended Usage
Slowly rising power
Stable frequency at start-up
Recommended Usage
Stable frequency at start-up
301.
Table 28-10 on page
CKSEL3...0
0010
(1)
CC
), the CKDIV8
322.
Table
Table
33

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