LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 366

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
11.4 Read Current Frame Number (Command: 0xF5, Data: read 1 or 2
11.5 Read Test Register (Command: 0xFD, Data: read 2 bytes)
11.6 Set Device Status (Command: 0xFE, Data: write 1 byte)
bytes)
Returns the frame number of the last successfully received SOF. The frame number is
eleven bits wide. The frame number returns least significant byte first. In case the user is
only interested in the lower 8 bits of the frame number, only the first byte needs to be read.
The test register is 16 bits wide. It returns the value of 0xA50F if the USB clocks (usbclk
and AHB slave clock) are running.
The Set Device Status command sets bits in the Device Status Register.
Table 351. Set Device Status Register bit description
Bit Symbol
0
1
2
•
•
In case no SOF was received by the device at the beginning of a frame, the frame
number returned is that of the last successfully received SOF.
In case the SOF frame number contained a CRC error, the frame number returned will
be the corrupted frame number as received by the device.
CON
CON_CH
SUS
Value Description
0
1
0
1
0
1
Rev. 04 — 26 August 2009
The Connect bit indicates the current connect status of the
device. It controls the CONNECT output pin, used for
SoftConnect. Reading the connect bit returns the current connect
status. This bit is cleared by hardware when the V
is LOW for more than 3 ms. The 3 ms delay filters out temporary
dips in the V
Writing a 0 will make the CONNECT pin go HIGH.
Writing a 1 will make the CONNECT pin go LOW..
Connect Change.
This bit is cleared when read.
This bit is set when the device’s pull-up resistor is disconnected
because V
generated when this bit is 1.
Suspend: The Suspend bit represents the current suspend state.
When the device is suspended (SUS = 1) and the CPU writes a 0
into it, the device will generate a remote wakeup. This will only
happen when the device is connected (CON = 1). When the
device is not connected or not suspended, writing a 0 has no
effect. Writing a 1 to this bit has no effect.
This bit is reset to 0 on any activity.
This bit is set to 1 when the device hasn’t seen any activity on its
upstream port for more than 3 ms.
BUS
BUS
disappeared. The DEV_STAT interrupt is
voltage.
Chapter 13: LPC24XX USB device controller
BUS
UM10237
status input
© NXP B.V. 2009. All rights reserved.
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Reset
value
0
0
0