LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 671

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
5.3 A/D Status Register (AD0STAT - 0xE003 4030)
Table 594: A/D Global Data Register (AD0GDR - address 0xE003 4004) bit description
The A/D Status register allows checking the status of all A/D channels simultaneously.
The DONE and OVERRUN flags appearing in the ADDRn register for each A/D channel
are mirrored in ADSTAT. The interrupt flag (the logical OR of all DONE flags) is also found
in ADSTAT.
Table 595: A/D Status Register (AD0STAT - address 0xE003 4030) bit description
Bit
5:0
15:6
23:16 Unused
26:24 CHN
29:27 Unused
30
31
Bit
7:0
15:8
16
31:17 Unused
Symbol
Done7:0
Overrun7:0 These bits mirror the OVERRRUN status flags that appear in the
ADINT
Symbol
Unused
V/V
OVERU
N
DONE
REF
Description
These bits always read as zeroes. They provide compatible expansion
room for future, higher-resolution A/D converters.
When DONE is 1, this field contains a binary fraction representing the
voltage on the Ain pin selected by the SEL field, divided by the voltage
on the V
pin was less than, equal to, or close to that on V
indicates that the voltage on Ain was close to, equal to, or greater than
that on V
These bits always read as zeroes. They allow accumulation of
successive A/D values without AND-masking, for at least 256 values
without overflow into the CHN field.
These bits contain the channel from which the LS bits were converted.
These bits always read as zeroes. They could be used for expansion of
the CHN field in future compatible A/D converters that can convert more
channels.
This bit is 1 in burst mode if the results of one or more conversions was
(were) lost and overwritten before the conversion that produced the
result in the LS bits. In non-FIFO operation, this bit is cleared by reading
this register.
This bit is set to 1 when an A/D conversion completes. It is cleared
when this register is read and when the ADCR is written. If the ADCR is
written while a conversion is still in progress, this bit is set and a new
conversion is started.
A/D channel Done flags is asserted and enabled to contribute to the
A/D interrupt via the ADINTEN register.
Unused, always 0.
Description
These bits mirror the DONE status flags that appear in the result
register for each A/D channel.
result register for each A/D channel. Reading ADSTAT allows
checking the status of all A/D channels simultaneously.
This bit is the A/D interrupt flag. It is one when any of the individual
Rev. 04 — 26 August 2009
DDA
REF
.
pin. Zero in the field indicates that the voltage on the Ain
Chapter 28: LPC24XX Analog-to Digital Converter (ADC)
SSA
, while 0x3FF
UM10237
© NXP B.V. 2009. All rights reserved.
671 of 792
Reset
Value
0
X
0
X
0
0
0
Reset
Value
0
0
0
0