LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 391

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
Table 359. USB OTG port pins
UM10237_4
User manual
Pin name
USB_INT1
USB_SCL1
USB_SDA1
USB_TX_E1
USB_TX_DP1
USB_TX_DM1
USB_RCV1
USB_RX_DP1
USB_RX_DM1
USB_LS1
USB_SSPND1
USB_PPWR1
USB_PWRD1
USB_OVRCR1
USB_HSTEN1
Port U2
USB_D+2
USB_D − 2
USB_CONNECT2 O
USB_UP_LED2
USB_PPWR2
U2PWRD2
USB_OVRCR2
USB_HSTEN2
3.1.1 USB host usage note
3.2.1 Register map
3.2 Software interface
Direction
I
I/O
I/O
O
O
O
I
I
I
O
O
O
I
I
O
I/O
I/O
O
O
I
I
O
Both ports can be configured as USB hosts. For details on how to connect the USB ports,
see the USB OTG chapter,
The USB device/host/OTG controller is disabled after RESET and must be enabled by
writing a 1 to the PCUSB bit in the PCONP register, see
The software interface of the USB host block consists of a register view and the format
definitions for the endpoint descriptors. For details on these two aspects see the OHCI
specification. The register map is shown in the next subsection.
The following registers are located in the AHB clock ‘cclk’ domain. They can be accessed
directly by the processor. All registers are 32 bit wide and aligned in the word address
boundaries.
Description
OTG ATX interrupt
I
I
Transmit enable
D+ transmit data
D − transmit data
Differential receive data
D+ receive data
D − receive data
Low speed status (applies to host functionality only)
Bus suspend status
Port power enable
Port power status
Over-current status
Host enabled status
Positive differential data
Negative differential data
SoftConnect control signal
GoodLink LED control signal
Port power enable
Port power status
Over-current status
Host enabled status
2
2
C serial clock
C serial data
Rev. 04 — 26 August 2009
Section 15–6 “Pin
Chapter 14: LPC24XX USB Host controller
configuration”.
Table
Pin category
External OTG transceiver
External OTG transceiver
External OTG transceiver
External OTG transceiver
External OTG transceiver
External OTG transceiver
External OTG transceiver
External OTG transceiver
External OTG transceiver
External OTG transceiver
External OTG transceiver
Host power switch
Host power switch
Host power switch
USB Connector
USB Connector
Control
Control
Host power switch
Host power switch
Host power switch
Control
4–63.
UM10237
© NXP B.V. 2009. All rights reserved.
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