R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 32

• Manufacturer Part Number: R5F21256SNFP#U0
• Description: IC R8C MCU FLASH 32K 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21256SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.2.00 Oct 17, 2005
REJ09B0001-0200
Chapter 1 Overview
Figure 1.7.3 Register Bit Specification
Figure 1.7.4 Addressing Modes Used for Memory Bit Specification
Table 1.7.1 Bit Specification Address Range
1.7.3 Bits
bit,base:16
bit,base:8[SB]
bit,base:11[SB]
bit,base:16[SB]
bit,base:8[FB]
[An]
base:8[An]
base:16[An]
Addressing
Figure 1.7.3 shows register bit specification.
Register bits can be specified by register directly (bit, Rn or bit, An). Use bit, Rn to specify a bit in a
data register (Rn); use bit, An to specify a bit in an address register (An).
The bits in each register are assigned bit numbers from 0 to 15, from LSB to MSB. Therefore, bit, Rn
and bit, An can be used to specify a bit number from 0 to 15.
Figure 1.7.4 shows the addressing modes used for memory bit specification. Table 1.7.1 lists the ad-
dress range in which bits can be specified in each addressing mode. Be sure to observe the address
range in Table 1.7.1 when specifying memory bits.
Register bits
Memory bits
bit,Rn
(bit: 0 to 15, n: 0 to 3)
Addressing modes
b15
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Lower Limit (Address)
00000
[SB]
[SB]
[SB]
[FB]–00010
00000
base:8
base:16
16
16
Rn
Specification range
16
Absolute addressing
SB-based relative
addressing
FB-based relative
addressing
Address register-based indirect
addressing
Address register-based relative
addressing
Upper Limit (Address)
01FFF
[SB]+0001F
[SB]+000FF
[SB]+01FFF
[FB]+0000F
01FFF
base:8+01FFF
base:16+01FFF
b0
16
16
16
16
16
16
bit,An
(bit: 0 to 15, n: 0 to 1)
16
16
The access range is 00000
The access range is 00000
The access range is 00000
The access range is 00000
The access range is 00000
The access range is 00000
b15
bit,base:8
bit,base:16
bit,base:8[SB]
bit,base:8[FB]
base:16[An]
bit,base:11[SB]
bit,base:16[SB]
[An]
base:8[An]
bit,base:16
An
Remarks
1.7 Data Types
16
16
16
16
16
16
to 0FFFF
to 0FFFF
to 0FFFF
to 0FFFF
to 020FE
to 0FFFF
b0
16
16
16
16
16
16
.
.
.
.
.
.