R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 38

IC R8C MCU FLASH 32K 52LQFP

R5F21256SNFP#U0

Manufacturer Part Number
R5F21256SNFP#U0
Description
IC R8C MCU FLASH 32K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets

Specifications of R5F21256SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Rev.2.00 Oct 17, 2005
REJ09B0001-0200
1.9 Instruction Formats
Chapter 1 Overview
The instruction formats can be classified into four types: generic, quick, short, and zero. The number of
instruction bytes that can be chosen by a given format is least for the zero format, and increases succes-
sively for the short, quick, and generic formats, in that order.
The features of each format are described below.
1.9.1 Generic Format (:G)
1.9.2 Quick Format (:Q)
1.9.3 Short Format (:S)
1.9.4 Zero Format (:Z)
The op-code in this format comprises two bytes. This op-code contains information on the operation
and the src
The instruction code is composed of op-code (2 bytes), src code (0 to 3 bytes), and dest code (0 to 3
bytes).
The op-code in this format comprises two bytes. This op-code contains information on the operation
and the immediate data and dest addressing modes. Note, however, that the immediate data in the op-
code is a numeric value that can be expressed as -7 to +8 or -8 to +7 (depending on the instruction).
The instruction code is composed of op-code (2 bytes) containing immediate data and dest code (0 to 2
bytes).
The op-code in this format comprises one byte. This op-code contains information on the operation and
the src and dest addressing modes. Note, however, that the usable addressing modes are limited.
The instruction code is composed of op-code (1 byte), src code (0 to 2 bytes), and dest code (0 to 2
bytes).
The op-code in this format comprises one byte. This op-code contains information on the operation
(plus immediate data) and dest addressing modes. Note, however, that the immediate data is fixed at 0,
and that the usable addressing modes are limited.
The instruction code is composed of op-code (1 byte) and dest code (0 to 2 bytes).
*1 src is an abbreviation of “source.”
*2 dest is an abbreviation of “destination.”
*1
and dest
page 18 of 263
*2
addressing modes.
1.9 Instruction Formats

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