MC9S12NE64VTU Freescale Semiconductor, MC9S12NE64VTU Datasheet - Page 319

• Manufacturer Part Number: MC9S12NE64VTU
• Description: IC MCU 25MHZ ETHERNET/PHY 80TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTU

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.3.2.6 PAUSE Timer Value and Counter (PTIME)
Module Base + $8
Read: Anytime.
Write: Anytime except while PTRC is clear, but the user must not change this field while TXACT is set.
PTIME — PAUSE Timer Value and Counter
11.3.2.7 Interrupt Event (IEVENT)
When an event occurs that sets a bit in the interrupt event register, an interrupt is generated if the
corresponding bit in the interrupt mask registers is also set. Each bit in the interrupt event register is cleared
by writing a 1 to that bit position. A write of 0 has no effect.
Read: Anytime.
Write: Anytime (0s have no effect).
RFCIF — Receive Flow Control Interrupt Flag
BREIF — Babbling Receive Error Interrupt Flag
Freescale Semiconductor
Module Base + $A
RESET:
RESET:
W
While the PTRC bit is set, the PTIME register controls the PAUSE duration parameter in units of slot
times (512 bit times) used in a transmission of a PAUSE control frame.
While PTRC bit is clear, the PTIME register indicates the current number of slot times (512 bit times)
remaining in a PAUSE period after the receiver accepts a PAUSE frame.
The value of the PAUSE timer counter is updated when a valid PAUSE control frame is accepted,
regardless of PTRC.
W
This flag is set when a full-duplex flow control PAUSE frame has been received. If not masked
(RFCIE is set), a receive flow control interrupt is pending while this flag is set.
This flag is set when the receive frame length exceeds the value of MAXFL. If not masked (BREIE is
set), a babbling receive error interrupt is pending while this flag is set.
R
R
1 = Transmitter stopped due to reception of a PAUSE frame.
0 = Normal transmit operation.
1 = A babbling receive error has been detected.
0 = No babbling receive errors have been detected.
RFCIF
15
15
0
0
= Unimplemented or Reserved
14
0
0
14
0
BREIF
13
0
13
0
Figure 11-7. PAUSE Timer Value and Counter (PTIME)
RXEIF RXAOIF RXBOIF RXACIF RXBCIF MMCIF
12
0
12
0
11
Figure 11-8. Interrupt Event (IEVENT)
0
11
0
MC9S12NE64 Data Sheet, Rev. 1.1
10
10
0
0
9
0
9
0
8
0
8
0
PTIME
7
0
7
0
6
0
6
0
0
LCIF
5
0
5
0
Memory Map and Register Descriptions
ECIF
4
0
4
0
3
0
3
0
0
2
0
0
2
0
TXCIF
1
0
1
0
0
0
0
0
0
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