MC9S12NE64VTU Freescale Semiconductor, MC9S12NE64VTU Datasheet - Page 91

• Manufacturer Part Number: MC9S12NE64VTU
• Description: IC MCU 25MHZ ETHERNET/PHY 80TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTU

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2.4.1.3.1
The erase verify operation is used to confirm that a Flash block is erased. After launching the erase verify
command, the CCIF flag in the FSTAT register will set after the operation has completed unless a second
command has been buffered. The number of bus cycles required to execute the erase verify operation is
equal to the number of addresses in the Flash block plus 12 bus cycles as measured from the time the
CBEIF flag is cleared until the CCIF flag is set. The result of the erase verify operation is reflected in the
state of the BLANK flag in the FSTAT register. If the BLANK flag is set in the FSTAT register, the Flash
memory is erased.
Freescale Semiconductor
Erase Verify Command
Clock Register
Loaded
Check
Access
Error Check
Bit Polling for
Command
Completion Check
Read: Register FCLKDIV
Figure 2-22. Example Erase Verify Command Flow
1.
2.
3.
Bit FDIVLD set?
yes
Write: Flash Block Address
and Dummy Data
Erase Verify Command 0x05
Write: Register FSTAT
Clear bit CBEIF 0x80
Write: Register FCMD
MC9S12NE64 Data Sheet, Rev. 1.1
Read: Register FSTAT
ACCERR
no
yes
yes
BLANK
Set?
Write: Register FCLKDIV
Bit
CCIF
Set?
Set?
EXIT
Bit
Bit
no
yes
no
no
NOTE: command write sequence
aborted by writing 0x00 to
FSTAT register.
NOTE: command write sequence
aborted by writing 0x00 to
FSTAT register.
Write: Register FSTAT
Clear bit ACCERR 0x10
Flash Block Not Erased;
Mass Erase Flash Block
Read: Register FSTAT
Functional Description
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