D13003TF16V Renesas Electronics America, D13003TF16V Datasheet - Page 180

• Manufacturer Part Number: D13003TF16V
• Description: IC H8/3003 ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13003TF16V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

7.3.3 Pseudo-Static RAM Refresh Control
Refresh Request Interval and Refresh Cycle Execution: The refresh request interval is
determined as in a DRAM interface, by the settings of RTCOR and bits CKS2 to CKS0 in
RTMCSR. The numbers of states required for pseudo-static RAM read/write cycles and refresh
cycles are the same as for DRAM (see table 7-4). The state transitions are as shown in figure 7-3.
Pseudo-Static RAM Control Signals: Figure 7-15 shows the control signals for pseudo-static
RAM read, write, and refresh cycles.
ø
Address
bus
CS
RD
HWR
LWR
RFSH
AS
Note:
3
*
16-bit access
Figure 7-15 Pseudo-Static RAM Control Signal Output Timing
Read cycle
160
Write cycle *
Area 3 top address
Refresh cycle