D13003TF16V Renesas Electronics America, D13003TF16V Datasheet - Page 281

IC H8/3003 ROMLESS 112QFP

D13003TF16V

Manufacturer Part Number
D13003TF16V
Description
IC H8/3003 ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of D13003TF16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D13003TF16V
Manufacturer:
RENESAS
Quantity:
210
Part Number:
D13003TF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
9.8 Port A
9.8.1 Overview
Port A is an 8-bit input/output port that is also used for output (TP
programmable timing pattern controller (TPC), input and output (TIOCB
TIOCA
pulse unit (ITU), and output (TEND
same set of pin functions in all operating modes. Figure 9-11 shows the pin configuration of
port A.
Pins in port A can drive one TTL load and a 30-pF capacitive load. They can also drive a
darlington transistor pair. Port A has Schmitt-trigger inputs.
9.8.2 Register Descriptions
Table 9-13 summarizes the registers of port A.
Table 9-13 Port A Registers
Address*
H'FFD1
H'FFD3
Note: * Lower 16 bits of the address.
1
Port A
, TIOCB
Name
Port A data direction register
Port A data register
0
, TIOCA
Port A pins
PA (input/output)/TP (output)/TIOCB (input/output)
PA (input/output)/TP (output)/TIOCA (input/output)
PA (input/output)/TP (output)/TIOCB (input/output)
PA (input/output)/TP (output)/TIOCA (input/output)
PA (input/output)/TP (output)/TIOCB (input/output)/TCLKD (input)
PA (input/output)/TP (output)/TIOCA (input/output)/TCLKC (input)
PA (input/output)/TP (output)/TEND (output)/TCLKB (input)
PA (input/output)/TP (output)/TEND (output)/TCLKA (input)
0
, TCLKD, TCLKC, TCLKB, TCLKA) by the 16-bit integrated timer-
Figure 9-11 Port A Pin Configuration
7
6
5
4
3
2
1
0
1
, TEND
0
) from the DMA controller (DMAC). Port A has the
261
7
6
5
4
3
2
1
0
Abbreviation
PADDR
PADR
1
0
2
2
1
1
0
0
7
to TP
2
0
R/W
W
R/W
, TIOCA
) from the
Initial Value
H'00
H'00
2
, TIOCB
1
,

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