Z8F0413HH005EG Zilog, Z8F0413HH005EG Datasheet - Page 182

• Manufacturer Part Number: Z8F0413HH005EG
• Description: IC ENCORE MCU FLASH 4K 20SSOP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0413HH005EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SSOP
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 269-4108; Z8F0413HH005EG

Assembly Language Syntax
eZ8 CPU Instruction Notation
PS024314-0308
For proper instruction execution, eZ8 CPU assembly language syntax requires that the
operands be written as ‘destination, source’. After assembly, the object code usually has
the operands in the order ‘source, destination’, but ordering is opcode-dependent. The
following instruction examples illustrate the format of some basic assembly instructions
and the resulting object code produced by the assembler. You must follow this binary for-
mat if you prefer manual program coding or intend to implement your own assembler.
Example 1
If the contents of Registers
assembly syntax and resulting object code is:
Table 103. Assembly Language Syntax Example 1
Example 2
In general, when an instruction format requires an 8-bit register address, that address can
specify any register location in the range 0–255 or, using Escaped Mode Addressing, a
Working Register R0–R15. If the contents of Register
added and the result is stored in
Table 104. Assembly Language Syntax Example 2
See the device-specific Product Specification to determine the exact register file range
available. The register file size varies, depending on the device type.
In the eZ8 CPU Instruction Summary and Description sections, the operands, condition
codes, status flags, and address modes are represented by a notational shorthand that is
described in
Assembly Language Code ADD
Object Code
Assembly Language Code ADD
Object Code
Table 105.
43H
04
04
and
43H
, the assembly syntax and resulting object code is:
08H
43H,
08
43H,
E8
are added and the result is stored in
08H
43
R8
43
43H
Z8 Encore! XP
(ADD dst, src)
(OPC src, dst)
(ADD dst, src)
(OPC src, dst)
and Working Register R8 are
Product Specification
eZ8 CPU Instruction Set
®
F0823 Series
43H
, the
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