Z16F2811FI20SG Zilog, Z16F2811FI20SG Datasheet - Page 250

IC ZNEO MCU FLASH 128K 80QFP

Z16F2811FI20SG

Manufacturer Part Number
Z16F2811FI20SG
Description
IC ZNEO MCU FLASH 128K 80QFP
Manufacturer
Zilog
Series
Encore!® ZNEOr
Datasheets

Specifications of Z16F2811FI20SG

Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
60
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
80-BQFP
Processor Series
Z16F2x
Core
Zneo
Data Bus Width
16 bit
Data Ram Size
4 B
Interface Type
ESPI, I2C, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
60
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z16F2800100ZCOG
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4534

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z16F2811FI20SG
Manufacturer:
Zilog
Quantity:
155
Part Number:
Z16F2811FI20SG
Manufacturer:
Zilog
Quantity:
10 000
Table 117. I
Table 116. I2CSTATE_L
BITS
FIELD
RESET
R/W
ADDR
PS022008-0810
State
I2CSTATE_H
0000–0100
0110–0111
0101
1000–1111
I
2
C Mode Register
DMAIF
2
C Mode Register (I2CMODE)
R/W
7
0
Sub-State
I2CSTATE_L
0000
0000
0000
0001
0111
0110
0101
0100
0011
0010
0001
0000
1000
The I
operating mode, Slave address and diagnostic modes.
2
C Mode register (see
6
MODE[1:0]
Sub-state Name
Master Start
Master Restart
send/receive bit 7
send/receive bit 6
send/receive bit 5
send/receive bit 4
send/receive bit 3
send/receive bit 2
send/receive bit 1
send/receive bit 0
send/receive
Acknowledge
R/W
0
5
P R E L I M I N A R Y
Table
R/W
117) provides control over Master versus Slave
IRM
4
0
FF-E246H
State Description
There are no substates for these I2CSTATE_H
values.
There are no substates for these I2CSTATE_H
values.
Initiating a new transaction.
new one without letting the bus go non-active.
Sending/Receiving most significant bit.
Sending/Receiving least significant bit
Sending/Receiving Acknowledge
Master is ending one transaction and starting a
GCE
R/W
3
0
2
SLA[9:8]
I
2
R/W
C Master/Slave Controller
Product Specification
0
ZNEO
1
Z16F Series
DIAG
R/W
0
0
234

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