DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 12

IC DSPIC MCU/DSP 12K 28SSOP

DSPIC33FJ12GP202-I/SS

Manufacturer Part Number
DSPIC33FJ12GP202-I/SS
Description
IC DSPIC MCU/DSP 12K 28SSOP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Package
28SSOP
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
TABLE 1-1:
DS70264D-page 10
PGED1
PGEC1
PGED2
PGEC2
PGED3
PGEC3
V
V
V
V
V
AV
MCLR
AV
V
Legend: CMOS = CMOS compatible input or output
Pin Name
REF
REF
CAP
DDCORE
SS
DD
DD
SS
+
-
/
ST = Schmitt Trigger input with CMOS levels
PPS = Peripheral Pin Select
Type
Pin
I/O
I/O
I/O
I/P
P
P
P
P
P
I
I
I
I
I
PINOUT I/O DESCRIPTIONS (CONTINUED)
Analog
Analog
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
P
P
PPS
No
No
No
No
No
No
No
No
No
No
No
No
No
No
Data I/O pin for programming/debugging communication channel 1.
Clock input pin for programming/debugging communication channel 1.
Data I/O pin for programming/debugging communication channel 2.
Clock input pin for programming/debugging communication channel 2.
Data I/O pin for programming/debugging communication channel 3.
Clock input pin for programming/debugging communication channel 3.
CPU logic filter capacitor connection.
Ground reference for logic and I/O pins.
Analog voltage reference (high) input.
Analog voltage reference (low) input.
Positive supply for analog modules. This pin must be connected at all times.
Master Clear (Reset) input. This pin is an active-low Reset to the device.
Ground reference for analog modules.
Positive supply for peripheral logic and I/O pins.
Preliminary
Analog = Analog input
O = Output
Description
© 2009 Microchip Technology Inc.
P = Power
I = Input

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