DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 178

• Manufacturer Part Number: DSPIC33FJ12GP202-I/SS
• Description: IC DSPIC MCU/DSP 12K 28SSOP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SSOP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33FJ12GP201/202
19.2
The dsPIC33FJ12GP201/202 devices power their core
digital logic at a nominal 2.5V. This can create a conflict
for designs that are required to operate at a higher
typical voltage, such as 3.3V. To simplify system
design, both devices in the dsPIC33FJ12GP201/202
family incorporate an on-chip regulator that allows the
device to run its core logic from V
The regulator provides power to the core from the other
V
(less than 5 ohms) capacitor (such as tantalum or
ceramic) must be connected to the V
(Figure 19-1). This helps to maintain the stability of the
regulator. The recommended value for the filter capac-
itor is provided in Table 22-13 located in Section 22.1
“DC Characteristics”.
On a POR
voltage regulator to generate an output voltage. During
this time, designated as T
disabled. T
resumes operation after any power-down.
FIGURE 19-1:
DS70264D-page 176
DD
Note:
Note 1:
pins. When the regulator is enabled, a low ESR
2:
On-Chip Voltage Regulator
C
,
EFC
STARTUP
it takes approximately 20 μs for the on-chip
It is important for low-ESR capacitors to be
placed as close as possible to the
V
CAP
These are typical operating voltages. Refer
to Table 22-13 located in Section 22.1 “DC
Characteristics” for the full operating
ranges of V
It is important for low-ESR capacitors to be
placed as close as possible to the
V
3.3V
CAP
/V
/V
DDCORE
DDCORE
is applied every time the device
CONNECTIONS FOR THE
ON-CHIP VOLTAGE
REGULATOR
V
V
V
DD
DD
CAP
SS
dsPIC33F
STARTUP
and V
pin.
pin.
/V
DDCORE
CAP
DD
/V
, code execution is
.
DDCORE
CAP
(1)
/V
DDCORE
.
Preliminary
pin
19.3
The BOR module is based on an internal voltage refer-
ence circuit that monitors the regulated voltage
V
is to generate a device Reset when a brown-out condi-
tion occurs. Brown-out conditions are generally caused
by glitches on the AC mains (for example, missing por-
tions of the AC cycle waveform due to bad power trans-
mission lines, or voltage sags due to excessive current
draw when a large inductive load is turned on).
A BOR generates a Reset pulse, which resets the
device. The BOR selects the clock source, based on
the device Configuration bit values (FNOSC<2:0> and
POSCMD<1:0>).
If an oscillator mode is selected, the BOR activates the
Oscillator Start-up Timer (OST). The system clock is
held until OST expires. If the PLL is used, the clock is
held until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the PWRT time-out (TPWRT) will be
applied before the internal Reset is released. If
TPWRT = 0 and a crystal oscillator is being used, a
nominal delay of TFSCM = 100 is applied. The total
delay in this case is TFSCM.
The BOR Status bit (RCON<1>) is set to indicate that a
BOR has occurred. The BOR circuit continues to oper-
ate while in Sleep or Idle modes and resets the device
should V
CAP
/V
DDCORE
DD
BOR Module
fall below the BOR threshold voltage.
. The main purpose of the BOR module
© 2009 Microchip Technology Inc.