DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 235

• Manufacturer Part Number: DSPIC33FJ12GP202-I/SS
• Description: IC DSPIC MCU/DSP 12K 28SSOP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SSOP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

APPENDIX A:
Revision A (January 2007)
Initial release of this document.
Revision B (May 2007)
This revision includes the following corrections and
updates:
• Minor typographical and formatting corrections
• New content:
• Figure update:
• Equation update:
• Register updates:
• Table updates:
• Operation value update:
© 2009 Microchip Technology Inc.
throughout the data sheet text.
- Addition of bullet item (16-word conversion
- Oscillator System Diagram (see Figure 8-1)
- WDT Block Diagram (see Figure 19-2)
- Serial Clock Rate (see Equation 15-1)
- Clock Divisor Register (see Register 8-2)
- PLL Feedback Divisor Register (see
- Peripheral Pin Select Input Registers (see
- ADC1 Input Channel 1, 2, 3 Select Register
- ADC1 Input Channel 0 Select Register (see
- CNEN2 (see Table 4-2 and Table 4-3)
- Reset Flag Bit Operation (see Table 5-1)
- Configuration Bit Values for Clock Operation
- IOLOCK set/clear operation (see
result buffer) (see Section 18.1 “Key
Features”)
Register 8-3)
Register 10-1 through Register 10-9)
(see Register 18-4)
Register 18-5)
(see Table 8-1)
Section 10.4.3.1 “Control Register Lock”)
REVISION HISTORY
Preliminary
dsPIC33FJ12GP201/202
• The following tables in Section 22.0 “Electrical
Characteristics” have been updated with
preliminary values:
- Updated Max MIPS for -40°C to +125°C
- Added new parameters for +125°C, and
- Added new parameters for +125°C, and
- Added new parameters for +125°C, and
- Added new parameters for +125°C, and
- Updated parameter DI51, added parameter
- Added Note 1 (see Table 22-11)
- Updated parameter OS30 (see Table 22-16)
- Updated parameter OS52 (see Table 22-17)
- Updated parameter F20, added Note 2 (see
- Updated parameter F21 (see Table 22-19)
- Updated parameter TA15 (see Table 22-22)
- Updated parameter TB15 (see Table 22-23)
- Updated parameter TC15 (see Table 22-24)
- Updated parameter IC15 (see Table 22-25)
- Updated parameters AD05, AD06, AD07,
- Separated the ADC Module Specifications
- Updated parameter AD50 (see Table 22-37)
- Updated parameters AD50 and AD57 (see
Temp Range (see Table 22-1)
updated Typical and Max values for most
parameters (see Table 22-5)
updated Typical and Max values for most
parameters (see Table 22-6)
updated Typical and Max values for most
parameters (see Table 22-7)
updated Typical and Max values for most
parameters (see Table 22-8)
DI51a (see Table 22-9)
Table 22-18)
AD08, AD10, and AD11; added parameters
AD05a and AD06a; added Note 2; modified
ADC Accuracy headings to include
measurement information (see Table 22-34)
table into three tables (see Table 22-34,
Table 22-35, and Table 22-36)
Table 22-38)
DS70264D-page 233