DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 127

IC DSPIC MCU/DSP 12K 28SSOP

DSPIC33FJ12GP202-I/SS

Manufacturer Part Number
DSPIC33FJ12GP202-I/SS
Description
IC DSPIC MCU/DSP 12K 28SSOP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Package
28SSOP
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
11.0
The Timer1 module is a 16-bit timer, which can serve
as the time counter for the real-time clock, or operate
as a free-running interval timer/counter. Timer1 can
operate in three modes:
• 16-bit Timer
• 16-bit Synchronous Counter
• 16-bit Asynchronous Counter
Timer1 also supports these features:
• Timer gate operation
• Selectable prescaler settings
• Timer operation during CPU Idle and Sleep
• Interrupt on 16-bit Period register match or falling
FIGURE 11-1:
© 2009 Microchip Technology Inc.
Note:
modes
edge of external gate signal
TIMER1
This data sheet summarizes the features
of the dsPIC33FJ12GP201/202 family of
devices. It is not intended to be a
comprehensive
complement the information in this data
sheet, refer to the “dsPIC33F Family
Reference Manual”, Section 11. “Timers”
(DS70205), which is available from the
Microchip web site (www.microchip.com).
SOSCO/
SOSCI
Set T1IF
T1CK
16-BIT TIMER1 MODULE BLOCK DIAGRAM
TGATE
0
1
reference
Reset
Equal
source.
SOSCEN
Comparator
TMR1
PR1
Preliminary
To
Q
Q
dsPIC33FJ12GP201/202
Gate
Sync
CK
T
CY
D
Figure 11-1 presents a block diagram of the 16-bit timer
module.
To configure Timer1 for operation:
1.
2.
3.
4.
5.
6.
Set the TON bit (= 1) in the T1CON register.
Select the timer prescaler ratio using the
TCKPS<1:0> bits in the T1CON register.
Set the Clock and Gating modes using the TCS
and TGATE bits in the T1CON register.
Set or clear the TSYNC bit in T1CON to select
synchronous or asynchronous operation.
Load the timer period value into the PR1
register.
If interrupts are required, set the interrupt enable
bit, T1IE. Use the priority bits, T1IP<2:0>, to set
the interrupt priority.
TSYNC
1x
01
00
0
1
TON
TGATE
TCS
Sync
TCKPS<1:0>
1, 8, 64, 256
Prescaler
2
DS70264D-page 125

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