DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 97

IC DSPIC MCU/DSP 12K 28SSOP

DSPIC33FJ12GP202-I/SS

Manufacturer Part Number
DSPIC33FJ12GP202-I/SS
Description
IC DSPIC MCU/DSP 12K 28SSOP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Package
28SSOP
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
EQUATION 8-2:
For example, suppose a 10 MHz crystal is being used,
with “XT with PLL” being the selected oscillator mode.
• If PLLPRE<4:0> = 0, then N1 = 2. This yields a
• If PLLDIV<8:0> = 0x1E, then M = 32. This yields a
• If PLLPOST<1:0> = 0, then N2 = 2. This provides
FIGURE 8-2:
TABLE 8-1:
© 2009 Microchip Technology Inc.
Fast RC Oscillator with Divide-by-N (FRCDIVN)
Fast RC Oscillator with Divide-by-16 (FRCDIV16)
Low-Power RC Oscillator (LPRC)
Secondary (Timer1) Oscillator (SOSC)
Primary Oscillator (HS) with PLL (HSPLL)
Primary Oscillator (XT) with PLL (XTPLL)
Primary Oscillator (EC) with PLL (ECPLL)
Primary Oscillator (HS)
Primary Oscillator (XT)
Primary Oscillator (EC)
Fast RC Oscillator with PLL (FRCPLL)
Fast RC Oscillator (FRC)
Note 1:
Source (Crystal, External Clock
VCO input of 10/2 = 5 MHz, which is within the
acceptable range of 0.8-8 MHz.
VCO output of 5 x 32 = 160 MHz, which is within
the 100-200 MHz ranged needed.
a Fosc of 160/2 = 80 MHz. The resultant device
operating speed is 80/2 = 40 MIPS.
or Internal RC)
2:
OSC2 pin function is determined by the OSCIOFNC Configuration bit.
This is the default oscillator mode for an unprogrammed (erased) device.
Note 1: This frequency range must be satisfied at all times.
F
OSC
Oscillator Mode
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
=
F
dsPIC33FJ12GP201/202 PLL BLOCK DIAGRAM
OSC
F
IN
CALCULATION
------------------ -
N1 N2
M
PLLPRE
Divide by
2-33
N1
0.8-8.0 MHz
Here
Preliminary
(1)
Secondary
X
dsPIC33FJ12GP201/202
Oscillator
Primary
Primary
Primary
Primary
Primary
Primary
Source
Internal
Internal
Internal
Internal
Internal
EQUATION 8-3:
Divide by
PLLDIV
2-513
F
VCO
M
CY
POSCMD<1:0>
=
100-200 MHz
F
-------------
Here
OSC
2
xx
xx
xx
xx
10
01
00
10
01
00
xx
xx
F
VCO
(1)
=
1
-- -
2
PLLPOST
XT WITH PLL MODE
EXAMPLE
Divide by
10000000 32
--------------------------------- -
2, 4, 8
N2
FNOSC<2:0>
2 2 ⋅
111
110
101
100
011
011
011
010
010
010
001
000
12.5-80 MHz
DS70264D-page 95
Here
=
40 MIPS
(1)
Note
1, 2
F
1
1
1
1
1
1
1
OSC

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