DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 245

• Manufacturer Part Number: DSPIC33FJ12GP202-I/SS
• Description: IC DSPIC MCU/DSP 12K 28SSOP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SSOP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Reset
Reset Sequence ................................................................. 65
Resets ................................................................................. 57
S
Serial Peripheral Interface (SPI) ....................................... 139
Software Reset Instruction (SWR) ...................................... 63
Software Simulator (MPLAB SIM)..................................... 188
Software Stack Pointer, Frame Pointer
Special Features of the CPU ............................................ 173
SPI Module
Symbols Used in Opcode Descriptions............................. 180
System Control
T
Temperature and Voltage Specifications
Timer1 ............................................................................... 125
Timer2/3 ............................................................................ 127
Timing Characteristics
Timing Diagrams
Timing Requirements
© 2009 Microchip Technology Inc.
PMD1 (Peripheral Module Disable Control Register 1) ..
PMD2 (Peripheral Module Disable Control Register 2) ..
RCON (Reset Control) ................................................ 58
SPIxCON1 (SPIx Control 1)...................................... 141
SPIxCON2 (SPIx Control 2)...................................... 143
SPIxSTAT (SPIx Status and Control) ....................... 140
SR (CPU Status)................................................... 18, 70
T1CON (Timer1 Control)........................................... 126
T2CON Control ......................................................... 130
T3CON Control ......................................................... 131
UxMODE (UARTx Mode).......................................... 154
UxSTA (UARTx Status and Control)......................... 156
Illegal Opcode ....................................................... 57, 63
Trap Conflict................................................................ 63
Uninitialized W Register.................................. 57, 63, 64
CALL Stack Frame...................................................... 42
SPI1 Register Map...................................................... 36
Register Map............................................................... 40
AC ............................................................................. 200
CLKO and I/O ........................................................... 203
10-bit A/D Conversion............................................... 223
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0, ASAM
12-bit A/D Conversion (ASAM = 0, SSRC = 000) ..... 222
Brown-out Situations................................................... 62
External Clock........................................................... 201
I2Cx Bus Data (Master Mode) .................................. 214
I2Cx Bus Data (Slave Mode) .................................... 217
I2Cx Bus Start/Stop Bits (Master Mode) ................... 214
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 217
Input Capture (CAPx)................................................ 208
OC/PWM................................................................... 209
Output Compare (OCx)............................................. 208
Reset, Watchdog Timer, Oscillator Start-up Timer and
SPIx Master Mode (CKE = 0) ................................... 209
SPIx Master Mode (CKE = 1) ................................... 210
SPIx Slave Mode (CKE = 0) ..................................... 212
SPIx Slave Mode (CKE = 1) ..................................... 213
Timer1, 2 and 3 External Clock................................. 205
CLKO and I/O ........................................................... 203
DCI AC-Link Mode .................................................... 219
DCI Multi-Channel, I
105
106
= 0, SSRC = 000) ............................................. 223
Power-up Timer ................................................ 204
2
S Modes.................................. 219
Preliminary
dsPIC33FJ12GP201/202
Timing Specifications
U
UART Module
Using the RCON Status Bits............................................... 64
V
Voltage Regulator (On-Chip) ............................................ 176
W
Watchdog Time-out Reset (WDTR).................................... 63
Watchdog Timer (WDT)............................................ 173, 177
WWW Address ................................................................. 244
WWW, On-Line Support ....................................................... 6
External Clock .......................................................... 201
Input Capture............................................................ 208
10-bit A/D Conversion Requirements ....................... 224
12-bit A/D Conversion Requirements ....................... 222
I2Cx Bus Data Requirements (Master Mode)........... 214
I2Cx Bus Data Requirements (Slave Mode)............. 217
Output Compare Requirements................................ 208
PLL Clock ................................................................. 202
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
Simple OC/PWM Mode Requirements ..................... 209
SPIx Master Mode (CKE = 0) Requirements............ 209
SPIx Master Mode (CKE = 1) Requirements............ 211
SPIx Slave Mode (CKE = 0) Requirements.............. 212
SPIx Slave Mode (CKE = 1) Requirements.............. 213
Timer1 External Clock Requirements....................... 205
Timer2 External Clock Requirements....................... 207
Timer3 External Clock Requirements....................... 207
UART1 Register Map ................................................. 36
Programming Considerations ................................... 177
er-up Timer and Brown-out Reset Requirements...
205
DS70264D-page 243