DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 18

• Manufacturer Part Number: DSPIC33FJ12GP202-I/SS
• Description: IC DSPIC MCU/DSP 12K 28SSOP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SSOP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33FJ12GP201/202
FIGURE 3-1:
DS70264D-page 16
Control Block
Data Access
PSV & Table
Program Memory
Address Latch
Data Latch
23
23
Controller
Interrupt
23
dsPIC33FJ12GP201/202 CPU CORE BLOCK DIAGRAM
to Various Blocks
Control Signals
Control
Stack
Instruction
Logic
Decode &
PCU
Program Counter
Control
24
8
PCH
Control
Logic
Loop
16
PCL
Preliminary
16
Y Data Bus
X Data Bus
Divide Support
DSP Engine
Instruction Reg
Data Latch
ROM Latch
Address
Address Generator Units
X RAM
Latch
16
16
Data Latch
Address
Y RAM
Latch
EA MUX
W Register Array
16
16
16
16 x 16
16
16-bit ALU
© 2009 Microchip Technology Inc.
16
16
16
To Peripheral Modules
16