DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 244

• Manufacturer Part Number: DSPIC33FJ12GP202-I/SS
• Description: IC DSPIC MCU/DSP 12K 28SSOP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SSOP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33FJ12GP201/202
Instruction Set
Instruction-Based Power-Saving Modes ........................... 103
Internal RC Oscillator
Internet Address................................................................ 244
Interrupt Control and Status Registers................................ 69
Interrupt Setup Procedures ................................................. 91
Interrupt Vector Table (IVT) ................................................ 65
Interrupts Coincident with Power Save Instructions.......... 104
J
JTAG Boundary Scan Interface ........................................ 173
M
Memory Organization.......................................................... 27
Microchip Internet Web Site .............................................. 244
Modulo Addressing ............................................................. 44
MPLAB ASM30 Assembler, Linker, Librarian ................... 188
MPLAB ICD 2 In-Circuit Debugger.................................... 189
MPLAB ICE 2000 High-Performance Universal In-Circuit Em-
MPLAB Integrated Development Environment Software .. 187
MPLAB PM3 Device Programmer..................................... 189
MPLAB REAL ICE In-Circuit Emulator System................. 189
MPLINK Object Linker/MPLIB Object Librarian ................ 188
N
NVM Module
O
Open-Drain Configuration ................................................. 108
Output Compare................................................................ 135
P
Packaging ......................................................................... 225
Peripheral Module Disable (PMD)..................................... 104
Peripheral Pin Select
PICSTART Plus Development Programmer ..................... 190
DS70264D-page 242
File Register Instructions ............................................ 42
Fundamental Modes Supported.................................. 43
MAC Instructions......................................................... 43
MCU Instructions ........................................................ 42
Move and Accumulator Instructions ............................ 43
Other Instructions........................................................ 43
Overview ................................................................... 182
Summary................................................................... 179
Idle ............................................................................ 104
Sleep ......................................................................... 103
Use with WDT ........................................................... 177
IECx ............................................................................ 69
IFSx............................................................................. 69
INTCON1 .................................................................... 69
INTCON2 .................................................................... 69
IPCx ............................................................................ 69
Initialization ................................................................. 91
Interrupt Disable.......................................................... 91
Interrupt Service Routine ............................................ 91
Trap Service Routine .................................................. 91
Applicability ................................................................. 45
Operation Example ..................................................... 44
Start and End Address ................................................ 44
W Address Register Selection .................................... 44
ulator ......................................................................... 189
Register Map............................................................... 41
Registers ................................................................... 137
Details ....................................................................... 227
Marking ............................................................. 225, 226
Input Register Map...................................................... 37
Preliminary
Pinout I/O Descriptions (table).............................................. 9
PMD Module
PORTA
PORTB
Power-on Reset (POR)....................................................... 62
Power-Saving Features .................................................... 103
Program Address Space..................................................... 27
Program Memory
R
Reader Response............................................................. 245
Registers
Register Map .............................................................. 41
Register Map .............................................................. 40
Register Map .............................................................. 40
Clock Frequency and Switching ............................... 103
Construction ............................................................... 47
Data Access from Program Memory Using Program
Data Access from Program Memory Using Table Instruc-
Data Access from, Address Generation ..................... 48
Memory Map............................................................... 27
Table Read Instructions
Visibility Operation ...................................................... 50
Interrupt Vector ........................................................... 28
Organization ............................................................... 28
Reset Vector ............................................................... 28
AD1CHS0 (ADC1 Input Channel 0 Select ................ 170
AD1CHS123 (ADC1 Input Channel 1, 2, 3 Select)... 167
AD1CON1 (ADC1 Control 1) .................................... 163
AD1CON2 (ADC1 Control 2) .................................... 165
AD1CON3 (ADC1 Control 3) .................................... 166
AD1CSSL (ADC1 Input Scan Select Low)................ 172
AD1PCFGL (ADC1 Port Configuration Low) ............ 172
CLKDIV (Clock Divisor) .............................................. 98
CORCON (Core Control) ...................................... 20, 70
I2CxCON (I2Cx Control) ........................................... 147
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 151
I2CxSTAT (I2Cx Status) ........................................... 149
ICxCON (Input Capture x Control)............................ 134
IEC0 (Interrupt Enable Control 0) ............................... 78
IEC1 (Interrupt Enable Control 0) ............................... 80
IEC4 (Interrupt Enable Control 0) ............................... 81
IFS0 (Interrupt Flag Status 0) ..................................... 74
IFS1 (Interrupt Flag Status 1) ..................................... 76
IFS4 (Interrupt Flag Status 4) ..................................... 77
INTCON1 (Interrupt Control 1).................................... 71
INTCON2 (Interrupt Control 2).................................... 73
INTTREG Interrupt Control and Status Register ........ 90
IPC0 (Interrupt Priority Control 0) ............................... 82
IPC1 (Interrupt Priority Control 1) ............................... 83
IPC16 (Interrupt Priority Control 16) ........................... 89
IPC2 (Interrupt Priority Control 2) ............................... 84
IPC3 (Interrupt Priority Control 3) ............................... 85
IPC4 (Interrupt Priority Control 4) ............................... 86
IPC5 (Interrupt Priority Control 5) ............................... 87
IPC7 (Interrupt Priority Control 7) ............................... 88
NVMCON (Flash Memory Control) ............................. 53
NVMCON (Nonvolatile Memory Key) ......................... 54
OCxCON (Output Compare x Control) ..................... 137
OSCCON (Oscillator Control) ..................................... 96
OSCTUN (FRC Oscillator Tuning)............................ 100
PLLFBD (PLL Feedback Divisor)................................ 99
Space Visibility ................................................... 50
tions .................................................................... 49
TBLRDH ............................................................. 49
TBLRDL.............................................................. 49
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