DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 241

IC DSPIC MCU/DSP 12K 28SSOP

DSPIC33FJ12GP202-I/SS

Manufacturer Part Number
DSPIC33FJ12GP202-I/SS
Description
IC DSPIC MCU/DSP 12K 28SSOP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Package
28SSOP
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Revision D (June 2009)
This revision includes minor typographical and
formatting changes throughout the data sheet text.
Global changes include:
• Changed all instances of OSCI to OSC1 and
• Changed all instances of PGCx/EMUCx and
Changed all instances of V
to V
All other major changes are referenced by their
respective section in the following table.
TABLE 23-2:
© 2009 Microchip Technology Inc.
“High-Performance, 16-Bit Digital Signal
Controllers”
Section 2.0 “Guidelines for Getting
Started with 16-bit Digital Signal
Controllers”
Section 8.0 “Oscillator Configuration”
Section 10.0 “I/O Ports”
Section 15.0 “Serial Peripheral Interface
(SPI)”
Section 17.0 “Universal Asynchronous
Receiver Transmitter (UART)”
Section 22.0 “Electrical Characteristics” Updated the Min value for parameter DC12 (RAM Retention Voltage)
OSCO to OSC2
PGDx/EMUDx (where x = 1, 2, or 3) to PGECx
and PGEDx
CAP
/V
DDCORE
Section Name
MAJOR SECTION UPDATES
DDCORE
and V
DDCORE
Added Note 2 to the 28-Pin QFN-S and 44-Pin QFN pin diagrams,
which references pin connections to V
Added new section to the data sheet that provides guidelines on getting
started with 16-bit Digital Signal Controllers.
Updated the Oscillator System Diagram (see Figure 8-1).
Added Note 1 to the Oscillator Tuning (OSCTUN) register (see
Register 8-4).
Removed Table 10-1 and added reference to pin diagrams for I/O pin
availability and functionality.
Added Note 2 to the SPIx Control Register 1 (see Register 15-2).
Updated the UTXINV bit settings in the UxSTA register and added Note
1 (see Register 17-2).
and added Note 4 to the DC Temperature and Voltage Specifications
(see Table 22-4).
Updated the Min value for parameter DI35 (see Table 22-20).
Updated AD08 and added reference to Note 2 for parameters AD05a,
AD06a, and AD08a (see Table 22-34).
/V
CAP
Preliminary
dsPIC33FJ12GP201/202
Update Description
SS
.
DS70264D-page 239

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