PIC18F458T-I/PT Microchip Technology, PIC18F458T-I/PT Datasheet - Page 245

IC MCU FLASH 16KX16 W/CAN 44TQFP

PIC18F458T-I/PT

Manufacturer Part Number
PIC18F458T-I/PT
Description
IC MCU FLASH 16KX16 W/CAN 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F458T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F458T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(V
V
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To oper-
ate in Sleep, the A/D conversion clock must be derived
from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter which generates the result via successive
approximation.
FIGURE 20-1:
© 2006 Microchip Technology Inc.
REF
DD
+ pin and RA2/AN2/V
and V
Note 1: Channels AN5 through AN7 are not available on PIC18F2X8 devices.
SS
2: All I/O pins have diode protection to V
) or the voltage level on the RA3/AN3/
Converter
10-bit
A/D
Reference
voltage
A/D BLOCK DIAGRAM
REF
- pin.
V
V
REF
REF
-
+
(Input Voltage)
V
AIN
PCFG0
DD
and V
V
DD
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion is aborted.
Each port pin associated with the A/D converter can be
configured as an analog input (RA3 can also be a
voltage reference) or as a digital I/O.
The ADRESH and ADRESL registers contain the result
of the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH/ADRESL
registers, the GO/DONE bit (ADCON0<2>) is cleared
and A/D Interrupt Flag bit, ADIF, is set. The block
diagram of the A/D module is shown in Figure 20-1.
SS
.
V
SS
CHS2:CHS0
111
110
101
100
011
010
001
000
PIC18FXX8
DS41159E-page 243
AN7
AN2
AN1
AN0
AN6
AN5
AN4
AN3
(1)
(1)
(1)

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