PIC18F458T-I/PT Microchip Technology, PIC18F458T-I/PT Datasheet - Page 361

• Manufacturer Part Number: PIC18F458T-I/PT
• Description: IC MCU FLASH 16KX16 W/CAN 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F458T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 27-23:
TABLE 27-24: A/D CONVERSION REQUIREMENTS
© 2006 Microchip Technology Inc.
130
131
132
135
136
Note 1:
Param
No.
Note
A/D DATA
SAMPLE
2:
3:
4:
5:
A/D CLK
ADRES
BSF ADCON0, GO
T
T
T
T
T
Symbol
ADIF
AD
CNV
ACQ
SWC
AMP
GO
ADRES register may be read on the following T
See Section 20.0 “Compatible 10-Bit Analog-to-Digital Converter (A/D) Module” for minimum
conditions when input voltage has changed more than 1 LSb.
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (AV
is 50 .
On the next Q4 cycle of the device clock.
The time of the A/D clock period is dependent on the device frequency and the T
Q4
1:
2:
If the A/D clock source is selected as RC, a time of T
to be executed.
This is a minimal RC delay (typically 100 ns) which also disconnects the holding capacitor from the analog input.
132
A/d Clock Period
Conversion Time
(not including acquisition time) (Note 1)
Acquisition Time (Note 3)
Switching Time from Convert
Amplifier Settling Time (Note 2)
A/D CONVERSION TIMING
(Note 2)
Characteristic
9
DD
to AV
8
PIC18FXX8
PIC18LFXX8
PIC18FXX8
PIC18LFXX8
SS
OLD_DATA
or AV
7
Sample
SS
. . .
SAMPLING STOPPED
CY
to AV
is added before the A/D clock starts. This allows the SLEEP instruction
CY
. . .
DD
130
131
cycle.
). The source impedance ( R
Min
1.6
3.0
2.0
3.0
11
15
10
—
1
2
(Note 4)
20
20
Max
6.0
9.0
12
—
—
—
1
(5)
(5)
Units
T
AD
s
s
s
s
s
s
s
0
PIC18FXX8
T
T
A/D RC mode
A/D RC mode
-40 C
0 C
This may be used if the
“new” input voltage has not
changed by more than 1 LSb
(i.e., 5 mV @ 5.12V) from the
last sampled voltage (as
stated on C
OSC
OSC
S
AD
) on the input channels
based, V
based, V
clock divider.
Temp
DONE
NEW_DATA
Temp
Conditions
DS41159E-page 359
T
CY
HOLD
+125 C
REF
REF
+125 C
).
full range
3.0V