PIC18F458T-I/PT Microchip Technology, PIC18F458T-I/PT Datasheet - Page 252

• Manufacturer Part Number: PIC18F458T-I/PT
• Description: IC MCU FLASH 16KX16 W/CAN 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F458T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.1
There are eight modes of operation for the compara-
tors. The CMCON register is used to select these
modes. Figure 21-1 shows the eight possible modes.
The TRISD register controls the data direction of the
comparator pins for each mode. If the Comparator
FIGURE 21-1:
DS41159E-page 250
PIC18FXX8
Comparators Reset (POR Default Value)
CM2:CM0 = 000
Two Independent Comparators
CM2:CM0 = 010
Two Common Reference Comparators
CM2:CM0 = 100
One Independent Comparator with Output
CM2:CM0 = 001
A = Analog Input, port reads zeros always
D = Digital Input
CIS (CMCON<3>) is the Comparator Input Switch
RD1/PSP1
RD0/PSP0
RE1/AN6/WR/C1OUT
RD3/PSP3
RD2/PSP2
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
Comparator Configuration
A
A
A
A
A
A
A
A
A
A
A
D
A
A
D
D
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
COMPARATOR I/O OPERATING MODES
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
C1
C2
C1
C2
C1
C2
Off
Off
C1OUT
C2OUT
C1OUT
C2OUT
C1OUT
Off
(Read as ‘0’)
(Read as ‘0’)
(Read as ‘0’)
Two Common Reference Comparators with Outputs
CM2:CM0 = 101
Two Independent Comparators with Outputs
CM2:CM0 = 011
Comparators Off
CM2:CM0 = 111
Four Inputs Multiplexed to Two Comparators
CM2:CM0 = 110
RD1/PSP1
RD0/PSP0
RE1/AN6/WR/C1OUT
RD3/PSP3
RD2/PSP2
RE2/AN7/CS/C2OUT
RE1/AN6/WR/
C1OUT
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
RE2/AN7/CS/C2OUT
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown in
Section 27.0 “Electrical Characteristics”.
Note:
A
A
A
D
A
A
A
A
D
D
D
D
A
A
A
A
Comparator interrupts should be disabled
during a Comparator mode change;
otherwise, a false interrupt may occur.
V
V
V
V
V
V
V
V
V
V
V
V
CIS = 0
CIS = 1
CIS = 0
CIS = 1
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
© 2006 Microchip Technology Inc.
C1
C2
C1
C2
V
V
V
V
IN
IN
IN
IN
CV
-
+
-
+
REF
C1OUT
C2OUT
C1OUT
C2OUT
Off
Off
C1
C2
From V
(Read as ‘0’)
(Read as ‘0’)
REF
C1OUT
C2OUT
Module