PIC18F458T-I/PT Microchip Technology, PIC18F458T-I/PT Datasheet - Page 249

• Manufacturer Part Number: PIC18F458T-I/PT
• Description: IC MCU FLASH 16KX16 W/CAN 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F458T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.4
Figure 20-4 shows the operation of the A/D converter
after the GO bit has been set. Clearing the GO/DONE
bit during a conversion will abort the current conver-
sion. The A/D Result register pair will not be updated
with the partially completed A/D conversion sample.
That is, the ADRESH:ADRESL registers will continue
to contain the value of the last completed conversion
(or the last value written to the ADRESH:ADRESL
registers). After the A/D conversion is aborted, a 2 T
wait is required before the next acquisition is started.
After this 2 T
channel is automatically started.
FIGURE 20-3:
© 2006 Microchip Technology Inc.
Note:
A/D Conversions
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
AD
7
0000 00
wait, acquisition on the selected
ADRESH
A/D RESULT JUSTIFICATION
Right Justified
2 1 0 7
ADFM = 1
10-bit Result
ADRESL
0
AD
10-bit Result
20.4.1
The ADRESH:ADRESL register pair is the location
where the 10-bit A/D result is loaded at the completion
of the A/D conversion. This register pair is 16 bits wide.
The A/D module gives the flexibility to left or right justify
the 10-bit result in the 16-bit result register. The A/D
Format Select bit (ADFM) controls this justification.
Figure 20-3 shows the operation of the A/D result justi-
fication. The extra bits are loaded with ‘0’s. When an
A/D result will not overwrite these locations (A/D
disable), these registers may be used as two general
purpose 8-bit registers.
7
ADRESH
10-bit Result
A/D RESULT REGISTERS
ADFM = 0
Left Justified
0 7 6 5
PIC18FXX8
ADRESL
0000 00
DS41159E-page 247
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